Integrated circuit device incorporating metallurgical bond to enhance thermal conduction to a heat sink
View Patent ↗An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.
1. A method of manufacturing a flip chip integrated circuit device comprising:
positioning an integrated circuit die over an upper surface of a package substrate that includes an inner region and a peripheral region, the die including a first surface in contact with the package substrate and a second opposing surface having a metallic layer formed thereon;
placing a stiffener ring with upper and lower surfaces about the die, including attaching the lower surface to a peripheral region of the package substrate;
forming a first metallic preform on the metallic layer;
forming a second metallic preform on the upper surface of the stiffener ring;
positioning a heat sink over the first and second preforms; and
metallurgically bonding the heat sink to the integrated circuit die.
2. The method of claim 1 further including forming a metallic joint layer on the first and second metallic performs and the metallic layer and metallurgically bonding the heat sink to the metallic joint layer.
3. The method of claim 2 , wherein forming the metallic joint layer includes forming a gold-containing layer that contacts the first and second metallic performs and the metallic layer, forming an adhesion layer that contacts the heat sink, and forming a barrier layer located between the gold-containing layer and the adhesion layer.
4. The method of claim 2 wherein the second surface of the integrated circuit die comprises silicon and forming the joint layer includes migration of silicon from the second surface of the integrated circuit die into the first preform, thereby lowering the temperature at which the first preform melts.
5. The method of claim 2 wherein the second surface of the integrated circuit die comprises silicon and forming the joint layer includes migration of silicon from the second surface of the integrated circuit die into the preform such that the heat transfer joint comprises silicon.
6. The method of claim 1 , wherein the metallic layer includes an adhesion layer located on the die, a barrier layer located on the adhesion layer, and a gold-containing layer located on the barrier layer.
7. The method of claim 6 , wherein the gold-containing layer of the metallic layer contacts the first and second metallic performs.
8. The method of claim 7 , wherein forming the first and second metallic performs includes forming a gold-containing layer on the gold-containing layer of the metallic layer.
9. The method of claim 8 , wherein the adhesion layer comprises titanium and the barrier layer comprises platinum.
10. The method of claim 1 , wherein attaching the lower surface of the stiffener ring to a peripheral region of the package substrate includes using an adhesive.