Semiconductor device package, semiconductor apparatus, and methods for manufacturing the same
A method for manufacturing a package which includes: an etching step of etching a silicon substrate, and forming a via hole penetrating through the silicon substrate; and a step of embedding an electrically conductive material in the via hole, and forming a via plug, characterized in that the etching step includes a first etching step of forming the via hole in a straight shape, and a second etching step of forming the via hole in a taper shape.
1. A method for manufacturing a semiconductor device package comprising:
the following steps in order:
(1) a step of forming a mask pattern;
(2) a step of forming a first opening of a via hole in a taper shape on a silicon substrate by isotropic dry etching;
(3) a step of forming the via hole to penetrate through the silicon substrate in a straight shape to form a second opening by anisotropic dry etching;
(4) a step of forming the second opening of the via hole in a taper shape by isotropic dry etching; and
(5) a step of embedding conductive material in the via hole to form a via plug.
2. The method for manufacturing a semiconductor device package according to claim 1 , wherein said etching is carried out in a way such that each opening of the via hole is formed in a taper shape.
3. The method for manufacturing a semiconductor device package according to any one of claims 1 or 2 , wherein said method for manufacturing a semiconductor package further includes a step of forming a concave portion-in the silicon substrate.
4. The method for manufacturing a semiconductor device package according to claim 1 , wherein the mask pattern formed in step 1 is used in step 2 to step 4.
5. The method for manufacturing a semiconductor device package according to claim 1 , wherein step 2 comprises:
(2) a step of forming a first opening of a via hole in a taper shape on a silicon substrate by isotropic dry etching or anisotropic dry etching depending on a dry etching condition; wherein step 3 comprises:
(3) a step of forming the via hole to penetrate through the silicon substrate in a straight shape to form a second opening by isotropic dry etching or anisotropic dry etching depending on the dry etching condition; and wherein step 4 comprises:
(4) a step of forming the second opening of the via hole in a taper shape by isotropic dry etching or anisotropic dry etching depending on the dry etching condition.
6. The method for manufacturing a semiconductor device package according to claim 1 , wherein the first opening and the second opening are tapered to be wider at the first opening and the second opening than at a center portion of the via hole.
7. A method for manufacturing a semiconductor apparatus comprising:
the following steps in order:
(1) a step of forming a mask pattern;
(2) a step of forming a first opening of a via hole in a taper shape on a silicon substrate by isotropic dry etching;
(3) a step of forming the via hole to penetrate through the silicon substrate in a straight shape by anisotropic dry etching, the via hole now having the first opening and a second opening;
(4) a step of forming the second opening of the via hole in a taper shape by isotropic dry etching;
(5) a step of forming a concave portion in the silicon substrate;
(6) a step of embedding conductive material in the via hole to form a via plug, and
(7) a step of mounting a semiconductor device on the concave portion.
8. A method for manufacturing a semiconductor device package comprising:
the following steps in order:
(1) a step of dry etching a silicon substrate to form a straight via hole which penetrates through the silicon substrate;
(2) a step of forming a concave portion-in the silicon substrate that includes the straight via hole;
(3) a wet etching step of forming the straight via hole into a taper shape via hole; and
(4) a step of embedding conductive material in the taper shape via hole to form a via plug.