IP Library Granted Patent US 7,687,923
Granted Patent B2
US 7,687,923 · App. 11/933,758 · Granted Mar 30, 2010

Semiconductor device package having a back side protective scheme

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Quick Facts
Patent No.
US 7,687,923
App. No.
11/933,758
Granted
Mar 30, 2010
Kind
B2
Abstract

The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.

Claims (21)

1. A structure of semiconductor device package, comprising:

multiple dice having a back surface and an active surface;

a seed metal layer directly formed on said back surface of said dice;

an adhesive layer directly formed on said seed metal layer;

a protection substrate formed on said adhesive layer and made of BT, FR5, PI, FR4 or PCB, whereby a back side protective scheme is formed by said seed metal layer, said adhesive layer and said protection substrate for preventing said structure of semiconductor device package from cracking or warping while a force is exerted on said protection substrate; and

a plurality of bumps formed on said active surface of said dice for electrical connection.

2. The structure in claim 1 , wherein the material of said adhesive layer includes elastic type material.

3. The structure in claim 1 , wherein the material of said protection substrate includes build in fiber glass formed therein.

4. The structure in claim 1 , wherein the size of said protection substrate is the same as the size of said dice.

5. The structure in claim 1 , further comprising laser or ink marks formed on the top surface of said protection substrate.

6. The structure in claim 1 , further comprising a redistribution layer (RDL) formed on said active surface of said dice.

7. A method for forming a semiconductor device package, comprising:

providing a wafer with a plurality of dice, wherein said dice have a back surface and an active surface;

forming a seed metal layer directly on said back surface of said dice;

forming an adhesive layer directly on said seed metal layer;

forming a protection substrate made of BT, FR5, PI, FR4, or PCB on said adhesive layer;

forming a plurality of bumps on said active surface of said dice; and

singulating said plurality of dice into individual die by a dicing process.

8. The method in claim 7 , wherein said step of forming the protection substrate is performed by a panel bonding method.

9. The method in claim 7 , wherein said step of singulating said plurality of dice is performed by a sawing blade.

10. The method in claim 7 , further comprising a step of forming laser or ink marks on a top surface of said protection substrate.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2023
From: ADL ENERGY CORP.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 065957/0661 →
MERGER Recorded Sep 15, 2023
From: ADL ENGINEERING INC.; ADVANCED CHIP ENGINEERING TECHNOLOGY INC.
To: ADL ENGINEERING INC.
Reel/Frame 064926/0845 →
CHANGE OF NAME Recorded Sep 15, 2023
From: ADL ENGINEERING INC.
To: ADL ENERGY CORP.
Reel/Frame 064927/0462 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2007
From: YANG, WEN-KUN; HSU, HSIEN-WEN
To: ADVANCED CHIP ENGINEERING TECHNOLOGY INC.
Reel/Frame 020053/0678 →