Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same
View Patent ↗A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
1. A method for forming a metal line of a semiconductor device, comprising the steps of:
forming an insulation layer having a metal line forming region on a semiconductor substrate;
forming a Ta x B y layer on a surface of the insulation layer and a surface of the metal line forming region;
nitriding a surface of the Ta x B y layer to form an amorphous TaBN layer so as to form a diffusion barrier on a surface of the metal line forming region, wherein the diffusion barrier comprises a stack of the Ta x B y layer and the amorphous TaBN layer;
forming a metal layer on the diffusion barrier to fill the metal line forming region; and
removing the metal layer and the diffusion barrier until the insulation layer is exposed.
2. The method according to claim 1 , wherein the metal line forming region is formed to have a structure including a trench or a trench and a via hole formed in the trench.
3. The method according to claim 1 , wherein, in the Ta x B y layer, x has a range of 0.8˜1.2 and y has a range of 1.8˜2.2.
4. The method according to claim 3 , wherein the Ta x B y layer is formed as a TaB 2 layer.
5. The method according to claim 1 , wherein the Ta x B y layer is formed using CVD or ALD.
6. The method according to claim 1 , wherein the nitriding is implemented using nitrogen plasma.
7. The method according to claim 1 , further comprising:
after the step of forming the insulation layer having a metal line forming region on a semiconductor substrate, and before the step of forming the Ta x B y layer, forming a TaN layer on the surface of the insulation layer and the surface of the metal line forming region.
8. The method according to claim 7 , wherein the TaN layer is formed using ALD.
9. The method according to claim 1 , further comprising:
after the step of forming the amorphous TaBN layer, forming a seed layer on the amorphous TaBN layer, wherein the seed layer is an Ru layer.
10. The method according to claim 1 , wherein the diffusion barrier comprises a stack including a TaN layer, the Ta x B y layer having a hexagonal structure, and the amorphous TaBN layer.
11. The method according to claim 1 , wherein the metal layer comprises a copper layer.