IP Library Granted Patent US 7,626,436
Granted Patent B2
US 7,626,436 · App. 11/939,670 · Granted Dec 1, 2009

Automatic system clock detection system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,626,436
App. No.
11/939,670
Granted
Dec 1, 2009
Kind
B2
Abstract

An Automatic System Clock Detection System (ASCDS) may provide integrated circuits (ICs) with the capability to detect the frequency of an external crystal oscillator or clock source, and adjust the IC's internal PLL accordingly for proper IC operation. The frequency detection and PLL adjustment may be performed without any additional pins on the IC, and/or without requiring any additional external information. The ASCDS may be configured with an internal ring oscillator, which may be generated from standard logic elements, a watchdog counter, and an input clock counter. When the IC comes out of power on reset (POR), the ASCDS may compare the input clock counter with the watchdog counter, and determine the clock frequency of the input clock. It may then set the PLL parameters to ensure correct IC operation.

Claims (81)

1. A system comprising:

a source input configured to receive an external periodic signal;

a periodic signal generation circuit configured to receive control information and generate an internal periodic signal according to the control information; and

a detection circuit coupled to the periodic signal generation circuit and to the source input, and operable to:

determine, based on the external periodic signal, a source of the external periodic signal;

determine, based on the external periodic signal, a frequency of the external periodic signal; and

generate the control information, wherein the control information comprises information indicative of the source of the external periodic signal and the frequency of the external periodic signal.

2. The system of claim 1 , wherein the internal periodic signal and the external periodic signals are clock signals.

3. The system of claim 1 , wherein the source of the external periodic signal is one of:

a crystal; and

an external oscillator.

4. The system of claim 1 , wherein the periodic signal generation circuit comprises a phase locked loop (PLL) circuit.

5. The system of claim 4 , wherein the PLL circuit comprises a ring oscillator.

6. A method for automatically detecting a system clock, the method comprising:

receiving an external periodic signal;

determining a source and a frequency of the external periodic signal from the external periodic signal;

generating control information indicative of the source and the frequency of the external periodic signal; and

generating a system periodic signal according to the control information.

7. The method of claim 6 , wherein said determining the source and the frequency of the external periodic signal comprises:

counting down from an initial value to a first value using a first counter;

counting up from a second value using a second counter, wherein said counting up is performed simultaneously with said counting down; and

reading a current value of the second counter to obtain a final value of the second counter once said counting down to the first value has completed, wherein the final value of the second counter is indicative of the source of the external periodic signal.

8. The method of claim 7 ,

wherein said receiving the external periodic signal comprises receiving the external periodic signal over at least a first signal line; and

wherein said counting up from the second value comprises incrementing the current value of the second counter every time there is a change on the at least first signal line.

9. The method of claim 7 ,

wherein if the final value of the second counter is the second value, then the final value of the second counter is indicative of a crystal as the source of the external periodic signal; and

wherein if the final value of the second counter is not the second value, then the final value of the second counter is indicative of an oscillator as the source of the external periodic signal.

10. The method of claim 7 ,

wherein said generating the system periodic signal is performed using an internal oscillator having a given frequency;

wherein said determining the source and the frequency of the external periodic signal further comprises calculating the frequency of the external periodic signal from the given frequency of the internal oscillator, the initial value of the first counter, and the final value of the second counter.

11. A system comprising:

a first input terminal configured to couple to an external signal source operable to generate a first periodic signal;

a first circuit configured to receive control information and to generate a second periodic signal according to the control information; and

a second circuit coupled to the first circuit and to the first input terminal, wherein the second circuit is operable to:

determine a type of the external signal source based on signal activity at the first input terminal;

determine a frequency of the first periodic signal based on the signal activity at the first input terminal; and

generate the control information, wherein the control information comprises information indicative of the type of the external signal source and the frequency of the first periodic signal.

12. The system of claim 11 , wherein the second circuit comprises:

a first counter operable to count down from an initial value to a first value;

a second counter operable to count up from a second value, simultaneously with the first counter counting down from the initial value;

wherein the second circuit is further operable to obtain a final value of the second counter when the first counter has reached the first value, wherein the final value of the second counter is indicative of the type of the external signal source.

13. The system of claim 12 , wherein the system is operable to:

activate the first counter and the second counter upon the system powering up; and

disable the first circuit until the first counter has reached the first value.

14. The system of claim 12 , wherein the first circuit is configured to generate the second periodic signal according to the control information and an internal oscillator having a first frequency.

15. The system of claim 14 , wherein the second circuit is operable to determine the frequency of the first periodic signal from the initial value of the first counter, the final value of the second counter, and the internal oscillator frequency.

16. The system of claim 12 , wherein the second counter is configured to remain at the second value when no signal activity is detected at the first input terminal;

wherein the second circuit is further operable to:

determine that the external signal source is of a first type when the final value of the second counter is the second value; and

determine that the external signal source is of a second type when the final value of the second counter is not the second value.

17. The system of claim 11 , wherein the first input terminal is configured to operate at an operating voltage that is one of at least a first voltage and a second voltage, wherein the first voltage is higher than the second voltage;

wherein the system is operable to initially set the operating voltage to the first voltage;

wherein the second circuit is further operable to:

determine that the external signal source is of a first type when the operating voltage is the first voltage and no signal activity is detected at the first input terminal; and

determine that the external signal source is of a second type when the operating voltage is the first voltage and signal activity is detected at the first input terminal.

18. The system of claim 17 , wherein the second circuit comprises:

a first counter operable to count down from an initial value to a first value;

a second counter operable to:

count up from a second value, simultaneously with the first counter counting down from the initial value;

remain at the second value when no signal activity is detected at the first input terminal;

wherein the second circuit is further operable to obtain a final value of the second counter when the first counter has reached the first value, wherein the final value of the second counter is indicative of type of the external signal source.

19. The system of claim 18 , wherein upon having determined that the external signal source is of the first type,

the system is operable to set the operating voltage to the second voltage; and

the second circuit is operable to:

reset the first counter to the initial value; and

start the first counter and the second counter.

20. A method for detecting an external clock source, the method comprising:

monitoring a first input terminal configured to couple to an external signal source operable to generate a first periodic signal;

identifying the external signal source as being of a first type in response to said monitoring indicating that there is signal activity at the first input terminal;

determining a frequency of the first periodic signal based on the first periodic signal and in response to said identifying; and

generating a second periodic signal according to the determined frequency of the first periodic signal and according to said identifying the external signal source as being of the first type.

21. The method of claim 20 , wherein the external signal source being of the first type comprises the external signal source being an oscillator.

22. A method for detecting an external clock source, the method comprising:

monitoring a first input terminal configured to couple to an external signal source operable to generate a first periodic signal;

identifying the external signal source as being of a first type in response to said monitoring indicating that there is no signal activity at the first input terminal;

changing an operating voltage of the first input terminal in response to said identifying the external signal source as being of the first type;

detecting signal activity at the first terminal in response to said changing the operating voltage of the first input terminal;

determining a frequency of the first periodic signal based on the first periodic signal and in response to said detecting; and

generating a second periodic signal according to the determined frequency of the first periodic signal and according to said identifying the external signal source as being of the first type.

23. The method of claim 22 , wherein the external signal source being of the first type comprises the external signal source being a crystal.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
MERGER Recorded Dec 11, 2017
From: STANDARD MICROSYSTEMS CORPORATION
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044824/0608 →