IP Library Granted Patent US 8,618,552
Granted Patent B2
US 8,618,552 · App. 11/940,423 · Granted Dec 31, 2013

Low micropipe 100 mm silicon carbide wafer

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Quick Facts
Patent No.
US 8,618,552
App. No.
11/940,423
Granted
Dec 31, 2013
Kind
B2
Abstract

A high quality single crystal wafer of SiC is disclosed having a diameter of at least about 100 mm and a micropipe density of less than about 25 cm −2 .

Claims (51)

1. A high quality single crystal wafer of SiC having a diameter of at least about 100 mm and a micropipe density less than about 25 cm −2 .

2. A SiC crystal according to claim 1 wherein the micropipe density is less than about 20 cm −2 .

3. A SiC crystal according to claim 1 wherein the micropipe density is less than about 7 cm −2 .

4. A SiC crystal according to claim 1 wherein the crystal has a polytype selected from the group consisting of the 3C, 4H, 6H, 2H, and 15R polytypes.

5. A high quality semiconductor precursor wafer comprising:

a silicon carbide wafer having a diameter of at least about 100 mm;

said wafer having the 4H polytype; and

said wafer having a micropipe density on its surface of between 7 and 22 cm −2 .

6. A high quality semiconductor precursor wafer according to claim 5 wherein said surface micropipe density represents a count of the total micropipes on said surface divided by the surface area of said wafer.

7. A high quality semiconductor precursor wafer according to claim 6 wherein said surface micropipe density represents a count of the total micropipes on said surface following an etch that preferentially emphasizes micropipe defects.

8. A high quality semiconductor precursor wafer according to claim 7 wherein said surface micropipe density represents a count of the total micropipes on said surface following an etch of the surface in molten potassium hydroxide.

9. A high quality semiconductor precursor wafer comprising:

a silicon carbide wafer having a diameter of at least about 100 mm;

said wafer having the 4H polytype; and

said wafer having between about 545 and 1730 micropipes on its surface.

10. A high quality semiconductor precursor wafer according to claim 9 wherein said surface micropipes represent a count of the total micropipes on said surface.

11. A high quality semiconductor precursor wafer according to claim 10 wherein said surface micropipes represent a count of the total micropipes on said surface following an etch that preferentially emphasizes micropipe defects.

12. A high quality semiconductor precursor wafer according to claim 11 wherein said surface micropipes represent a count of the total micropipes on said surface following an etch of the surface in molten potassium hydroxide.

13. A high quality semiconductor precursor wafer comprising:

a silicon carbide wafer having a diameter of at least about 100 mm;

said wafer having the 4H polytype;

said wafer having a micropipe density on its surface of less than 25 cm −2 ; and

a Group III-nitride layer on said surface of said silicon carbide wafer.

14. A semiconductor precursor wafer according to claim 13 wherein said Group III-nitride layer is selected from the group consisting of GaN, A 1 GaN, AN, A 1 InGaN, InN, A 1 InN and mixtures thereof

15. A plurality of semiconductor device precursors comprising:

a silicon carbide wafer having a diameter of at least about 100 mm and micropipe density on the surface of less than 25 cm −2 ; and

a plurality of respective Group III-nitride epitaxial layers on some portions of said wafer.

16. A semiconductor wafer comprising:

a bulk single crystal silicon carbide substrate of at least about 100 mm and having a micropipe density of less than 25 cm −2 , said bulk single crystal having respective first and second surfaces opposite one another; and

a plurality of devices on said silicon carbide substrate, each said device comprising:

an epitaxial layer located on the substrate, said layer having a concentration of suitable dopant atoms for making the epitaxial layer a first conductivity type, and respective source, channel, and drain portions;

a metal oxide layer on said channel portion; and

a metal gate contact on said metal oxide layer for forming an active channel when a bias is applied to said metal gate contact.

17. A semiconductor wafer comprising:

a bulk single crystal silicon carbide substrate of at least about 100 mm and having a micropipe density of less than 25 cm −2 , said bulk single crystal having respective first and second surfaces opposite one another; and

a plurality of devices on said silicon carbide substrate, each said device comprising:

a conductive channel on said substrate;

a source and a drain on said conductive channel; and

a metal gate contact between said source and said drain on said conductive channel for forming an active channel when a bias is applied to the metal gate contact.

18. A semiconductor wafer comprising:

a bulk single crystal silicon carbide substrate of at least about 100 mm and having a micropipe density less than 25 cm −2 , said bulk single crystal having respective first and second surfaces opposite one another; and

a plurality of junction field-effect transistors positioned on said single crystal silicon carbide substrate.

19. A semiconductor wafer comprising:

a bulk single crystal silicon carbide substrate of at least about 100 mm and having a micropipe density less than 25 cm −2 , said bulk single crystal having respective first and second surfaces opposite one another; and

a plurality of hetero-field effect transistors positioned on said single crystal silicon carbide substrate.

20. A semiconductor wafer comprising:

a bulk single crystal silicon carbide substrate of at least about 100 mm and having a micropipe density less than 25 cm −2 , said bulk single crystal having respective first and second surfaces opposite one another; and

a plurality of diodes positioned on said single crystal silicon carbide substrate.

21. A high quality semiconductor precursor wafer according to claim 5 wherein said surface micropipe density is between 16 and 22 cm −2 .

22. A high quality semiconductor precursor wafer according to claim 9 wherein said wafer has between 1250 and 1730 micropipes on its surface.

23. A SiC crystal according to claim 1 wherein the micropipe density is between about 7 cm −2 and about 25 cm −2 .

Assignments (6)
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Dec 23, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 074049/0988 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Dec 23, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 074050/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Dec 23, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 074050/0026 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Dec 23, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 074050/0033 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 64185/0755 Recorded Sep 30, 2025
From: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WOLFSPEED, INC.
Reel/Frame 072989/0001 →
SECURITY INTEREST Recorded Jun 30, 2023
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 064185/0755 →