Method for multilevel programming of phase change memory cells using a percolation algorithm
View Patent ↗A method and apparatus for programming a phase change memory cell is disclosed. A phase change memory cell includes a memory element of a phase change material having a first state, in which the phase change material is crystalline and has a minimum resistance level, a second state in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states with resistance levels there between. The method includes using programming pulses to program the phase change memory cell in either the set, reset, or one of the intermediate states. To program in the intermediate states, a programming pulse creates a crystalline percolation path having an average diameter through amorphous phase change material and a second programming pulse modifies the diameter of the crystalline percolation path to program the phase change memory cell to the proper current level.
1. A method, comprising:
programming a phase change memory cell, wherein the phase change memory cell includes a memory element of a phase change material having a first state, in which said phase change material is crystalline and has a first resistance level (R 1 ), a second state in which said phase change material is amorphous and has a second resistance level (R 2 ), and a plurality of intermediate states having associated resistance levels between R 1 and R 2 , the programming including:
providing to the phase change memory cell a first programming pulse that creates a crystalline percolation path having an average diameter through the phase change material in the amorphous state; and
providing to the phase change memory cell one or more additional programming pulses that modify the average diameter of the crystalline percolation path to program the phase change memory cell in one of the intermediate states.
2. The method as claimed in claim 1 , further including applying a reset programming pulse to place the phase change material in the second state prior to applying the first programming pulse.
3. The method according to claim 1 , wherein the one or more additional programming pulses increase the average diameter of the crystalline percolation path.
4. The method according to claim 1 , wherein each of the one or more additional programming pulses has an increasing amplitude and a width equal to a width of an immediately previous programming pulse of the programming pulses.
5. The method according to claim 1 , wherein each of the one or more additional programming pulses have a fixed amplitude and an increasing width with respect to the previous programming pulse.
6. The method according to claim 1 , further including:
(a) reading a current level of the phase change memory cell;
(b) if the current level is below a target current level for programming one of the intermediate states, then applying an additional programming pulse having a larger amplitude than a previous programming pulse;
(c) repeating (a) and (b) until the target current level is obtained.
7. A method according to claim 1 , wherein said phase change memory cell is initialized before providing any programming pulses.
8. A method according to claim 7 , wherein initializing said phase change memory cell comprises providing an initialization pulse having such amplitude and duration as to bring said chalcogenic material to said second state and then to said first state.
9. A phase change memory device, comprising:
a plurality of phase change memory cells, wherein each phase change memory cell includes a memory element of a phase change material having a first state, in which said phase change material is crystalline and has a first resistance level (R 1 ), a second state in which said phase change material is amorphous and has a second resistance level (R 2 ), and a plurality of intermediate states having associated resistance levels between R 1 and R 2 ; and
a program circuit structured to provide to said phase change memory cells a first programming pulse that creates a crystalline percolation path having an average diameter through the phase change material in the amorphous state and one or more additional programming pulses that modify the average diameter of the crystalline percolation path to program the phase change memory cell in one of the intermediate states.
10. The phase change memory device of claim 9 , further including a verify circuit coupled to the programming circuit for reading a current from the phase change memory cell to determine if it reached the desired intermediate state.
11. The phase change memory device of claim 9 wherein the phase change memory cell includes a selector.
12. The phase change memory device of claim 11 , wherein the selector includes either a MOS or bipolar transistor.
13. The phase change memory device of claim 9 , wherein the phase change memory cell includes a heating element.
14. The phase change memory device of claim 9 , wherein the program circuit includes means for applying a reset programming pulse to place the phase change material in the second state prior to applying the first programming pulse.
15. The phase change memory device of claim 9 , wherein the one or more additional programming pulses increase the average diameter of the crystalline percolation path.
16. The phase change memory device of claim 9 , wherein each of the one or more additional programming pulses has an increasing amplitude and a width equal to a width of an immediately previous programming pulse of the programming pulses.
17. The phase change memory device of claim 9 , wherein each of the one or more additional programming pulses have a fixed amplitude and an increasing width with respect to the previous programming pulse.
18. The phase change memory device of claim 9 , wherein the program circuit includes means for initializing said phase change memory cell by providing an initialization pulse having such amplitude and duration as to bring said chalcogenic material to said second state and then to said first state.
19. A system comprising:
a processing unit;
an interface coupled to said processing unit; and
a nonvolatile phase change memory device coupled to said processing unit, the memory device including:
a plurality of phase change memory cells, wherein each phase change memory cell includes a memory element of a phase change material having a first state, in which said phase change material is crystalline and has a first resistance level, a second state in which said phase change material is amorphous and has a second resistance level, and a plurality of intermediate states having associated resistance levels between R 1 and R 2 ; and
a program circuit structured to provide to said phase change memory cells a first programming pulse that creates a crystalline percolation path having an average diameter through the phase change material in the amorphous state and one or more additional programming pulses that modify the average diameter of the crystalline percolation path to program the phase change memory cell in one of the intermediate states.
20. A system according to claim 19 , wherein said interface is a wireless interface.
21. A method, comprising:
programming a phase change memory cell to an intermediate state between a first state, in which said phase change material is crystalline and has a first resistance level (R 1 ) and a second state in which said phase change material is amorphous and has a second resistance level (R 2 ), the intermediate state having an intermediate resistance level between R 1 and R 2 , the programming including:
providing to the phase change memory cell a first programming pulse that creates a crystalline percolation path within the phase change material in the amorphous state; and
providing to the phase change memory cell one or more additional programming pulses that modify an average diameter of the crystalline percolation path to program the phase change memory cell in the intermediate state.
22. The method as claimed in claim 21 , further including applying a reset programming pulse to place the phase change material in the second state prior to applying the first programming pulse.
23. The method according to claim 21 , wherein the one or more additional programming pulses increase the average diameter of the crystalline percolation path.
24. The method according to claim 21 , wherein each of the one or more additional programming pulses has an increasing amplitude and a width equal to a width of an immediately previous programming pulse of the programming pulses.
25. The method according to claim 21 , wherein each of the one or more additional programming pulses have a fixed amplitude and an increasing width with respect to the previous programming pulse.
26. The method according to claim 21 , further including:
(a) reading a current level of the phase change memory cell;
(b) if the current level is below a target current level for programming to the intermediate state, then applying an additional programming pulse having a larger amplitude than a previous programming pulse;
(c) repeating (a) and (b) until the target current level is obtained.
27. A method according to claim 21 , wherein said phase change memory cell is initialized before providing any programming pulses by providing an initialization pulse having such amplitude and duration as to bring said chalcogenic material to said second state and then to said first state.