IP Library Assignment 029406/0001
Patent Assignment
Reel/Frame 029406/0001

Assignment of Assignor's Interest

Recorded: 2012-11-21 Pages: 165
Assignor
NUMONYX B.V.
Executed: 2012-05-23
Assignee
MICRON TECHNOLOGY, INC.
8000 SO. FEDERAL WAY, BOISE, IDAHO, 83716-9632
Covered Properties (39)
Material Deposition from a Liquefied Gas Solution
Patent: 6,677,233 →
Application: 10/039,095 →
Publication: US 2003/0124840
Process for Manufacturing a Dual Charge Storage Location Memory Cell
Patent: 6,825,523 →
Application: 10/267,033 →
Publication: US 2003/0067032
Small Area Contact Region, High Efficiency Phase Change Memory Cell and Fabrication Method Thereof
Patent: 7,227,171 →
Application: 10/313,991 →
Publication: US 2003/0219924
Single Supply Voltage, Nonvolatile Phase Change Memory Device with Cascoded Column Selection and Simultaneous Word Read/Write Operations
Patent: 6,754,107 →
Application: 10/331,185 →
Publication: US 2003/0223285
Phase Change Memory Cell and Manufacturing Method Thereof Using Minitrenches
Patent: 6,891,747 →
Application: 10/372,761 →
Publication: US 2003/0231530
Self-Repair Method via Ecc for Nonvolatile Memory Devices, and Relative Nonvolatile Memory Device
Patent: 6,901,011 →
Application: 10/417,416 →
Publication: US 2003/0231532
Circuit for Programming a Non-Volatile Memory Device with Adaptive Program Load Control
Patent: 6,956,773 →
Application: 10/706,306 →
Publication: US 2004/0145947
Method and Device for Programming an Electrically Programmable Non-Volatile Semiconductor Memory
Patent: 7,031,193 →
Application: 10/729,875 →
Publication: US 2004/0170062
Non-Volatile Memory Device with Improved Sequential Programming Speed
Patent: 6,940,756 →
Application: 10/739,928 →
Publication: US 2004/0165434
Negative Voltage Word Line Decoder Having Compact Terminating Elements
Patent: 7,046,577 →
Application: 10/760,631 →
Publication: US 2004/0230736
Semiconductor Memory with Access Protection Scheme
Patent: 7,249,231 →
Application: 10/781,974 →
Publication: US 2004/0205314
Method of Programming a Multi-Level, Electrically Programmable Non-Volatile Semiconductor Memory
Patent: 7,110,300 →
Application: 10/782,725 →
Publication: US 2004/0240270
Full-Swing Wordline Driving Circuit
Patent: 7,023,738 →
Application: 10/835,538 →
Publication: US 2005/0013170
Phase -Change Memory Device with Biasing of Deselected Bit Lines
Patent: 7,092,277 →
Application: 10/926,784 →
Publication: US 2005/0047193
Process for Manufacturing a Dual Charge Storage Location Memory Cell
Patent: 7,115,472 →
Application: 10/964,049 →
Publication: US 2005/0064654
Phase Change Memory Cell and Manufacturing Method Thereof Using Minitrenches
Patent: 7,993,957 →
Application: 11/045,170 →
Publication: US 2005/0152208
Differential Delay Compensation
Patent: 8,018,926 →
Application: 11/093,907 →
Publication: US 2006/0221944
Trimming Functional Parameters in Integrated Circuits
Patent: 7,221,212 →
Application: 11/113,818 →
Publication: US 2005/0253644
Page Buffer Circuit and Method for a Programmable Memory Device
Patent: 7,567,456 →
Application: 11/166,354 →
Publication: US 2006/0007774
Frequency-Dependent Voltage Control in Digital Logic
Patent: 7,603,575 →
Application: 11/173,218 →
Publication: US 2007/0006007
Programmable Nand Memory
Patent: 7,733,697 →
Application: 11/183,229 →
Publication: US 2006/0018159
Process for Manufacturing an Array of Cells Including Selection Bipolar Junction Transistors
Patent: 7,563,684 →
Application: 11/264,084 →
Publication: US 2006/0049392
Dual Resistance Heater for Phase Change Devices and Manufacturing Method Thereof
Patent: 7,880,123 →
Application: 11/312,231 →
Publication: US 2006/0246712
Method of Making a Floating Gate Non-Volatile Mos Semiconductor Memory Device with Improved Capacitive Coupling and Device Thus Obtained
Patent: 8,008,701 →
Application: 11/317,641 →
Publication: US 2006/0166438
Method of Making a Floating Gate Non-Volatile Mos Semiconductor Memory Device with Improved Capacitive Coupling
Patent: 8,384,148 →
Application: 11/317,679 →
Publication: US 2006/0205136
Enhanced Security Memory Access Method and Architecture
Patent: 8,276,185 →
Application: 11/337,085 →
Publication: US 2007/0192828
Memory Device with a Ramp-Like Voltage Biasing Structure Based on a Current Generator
Patent: 7,359,246 →
Application: 11/340,414 →
Publication: US 2006/0198187
Vertical Mosfet Transistor, in Particular Operating as a Selector in Nonvolatile Memory Devices
Patent: 7,847,329 →
Application: 11/411,982 →
Publication: US 2006/0278921
Semiconductor Memory Device with Information Loss Self-Detect Capability
Patent: 7,414,902 →
Application: 11/415,879 →
Publication: US 2007/0253238
Circuit and Method for Retrieving Data Stored in Semiconductor Memory Cells
Patent: 7,474,577 →
Application: 11/444,892 →
Publication: US 2006/0291322
Self-Adaptive Output Buffer Based on Charge Sharing
Patent: 7,586,331 →
Application: 11/482,524 →
Publication: US 2007/0040562
Row Selector Occupying a Reduced Device Area for Semiconductor Memory Devices
Patent: 7,965,561 →
Application: 11/672,857 →
Publication: US 2007/0195605
Circuit and Method for Electrically Programming a Non-Volatile Semiconductor Memory via an Additional Programming Pulse After Verification
Patent: 7,499,332 →
Application: 11/766,493 →
Publication: US 2008/0013378
Method for Compacting the Erased Threshold Voltage Distribution of Flash Memory Devices During Writing Operations
Patent: 7,529,136 →
Application: 11/844,480 →
Publication: US 2008/0049521
Method for Multilevel Programming of Phase Change Memory Cells Using a Percolation Algorithm
Patent: 7,639,526 →
Application: 11/949,598 →
Publication: US 2008/0151612
Circuit and Method for Retrieving Data Stored in Semiconductor Memory Cells
Patent: 7,889,586 →
Application: 12/248,843 →
Publication: US 2009/0262593
Vertical Mosfet Transistor, in Particular Operating as a Selector in Nonvolatile Memory Devices
Patent: 8,766,344 →
Application: 12/862,624 →
Publication: US 2010/0320432
Dual Resistance Heater for Phase Change Devices and Manufacturing Method Thereof
Patent: 8,513,576 →
Application: 12/980,141 →
Publication: US 2011/0155986
Phase Change Memory Cell and Manufacturing Method Thereof Using Minitrenches
Patent: 9,876,166 →
Application: 13/158,291 →
Publication: US 2011/0237045
Related Assignments (17)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 31, 2012
From: STMICROELECTRONICS S.A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 028888/0859 →
Assignment of Assignor's Interest Aug 31, 2012
From: STMICROELECTRONICS S.R.L. (FORMERLY KNOWN AS SGS-THOMSON MICROELECTRONICS S.R.L.)
To: MICRON TECHNOLOGY, INC.
Reel/Frame 028888/0816 →
Assignment of Assignor's Interest Oct 4, 2012
From: STMICROELECTRONICS N.V.
To: NUMONYX B.V.
Reel/Frame 029076/0493 →
Assignment of Assignor's Interest Jan 15, 2013
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS NV
Reel/Frame 029631/0001 →
Assignment of Assignor's Interest Aug 26, 2013
From: BEZ, ROBERTO; PELLIZZER, FABIO; TOSI, MARINA; ZONCA, ROMINA
To: STMICROELECTRONICS S.R.L.; OVONYX INC.
Reel/Frame 031230/0543 →
Assignment of Assignor's Interest Oct 24, 2013
From: STMICROELECTONICS NV
To: NUMONYX B. V.
Reel/Frame 031541/0355 →
Corrective Recordation Coversheet and Appendix to Remove Erroneously Listed Application Serial No. 11/495876 on Reel 029406 Frame 001 Dec 11, 2013
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032069/0337 →
Assignment of Assignor's Interest Dec 8, 2015
From: OVONYX, INC.
To: CARLOW INNOVATIONS LLC
Reel/Frame 037244/0954 →
Security Interest May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Patent Security Agreement Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
Change of Name Jul 18, 2016
From: CARLOW INNOVATIONS, LLC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039379/0077 →
Assignment of Assignor's Interest Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →
Corrective Assignment to Correct the Replace Erroneously Filed Patent #7358718 with the Correct Patent #7358178 Previously Recorded on Reel 038669 Frame 0001. Assignor(S) Hereby Confirms the Security Interest. Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
Security Interest Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
Release of Security Interest Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
Release of Security Interest Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
Release of Security Interest Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →