IP Library › Patent Application 12010885
Patent Application
App. No. 12/010,885

Phase-change memory and fabrication method thereof

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Quick Facts
Patent No.
US None
App. No.
12/010,885
Abstract

A phase-change memory is provided. The phase-change memory comprises a substrate. A first electrode is formed on the substrate. A circular or linear phase-change layer is electrically connected to the first electrode. A second electrode formed on the phase-change layer and electrically connected to the phase-change layer, wherein at least one of the first electrode and the second electrode comprises phase-change material.

Claims (43)

1 . A phase-change memory element, comprising

a substrate;

a first electrode formed on the substrate;

a circular or linear phase-change layer electrically connected to the first electrode; and

a second electrode formed on the phase-change layer and electrically connected to the phase-change layer, wherein at least one of the first electrode and the second electrode comprises phase-change material.

2 . The phase-change memory element as claimed in claim 1 , wherein the phase-change material comprises chalcogenide.

3 . The phase-change memory element as claimed in claim 1 , wherein the dimension of the circular or linear phase-change layer is less than the resolution limit of photolithography process.

4 . The phase-change memory element as claimed in claim 1 , wherein the dimensions of phase-change layer from top to bottom are the same and the phase-change layer is essentiality perpendicular to the first electrode and second electrode.

5 . A method for fabricating phase-change memory elements, comprising:

providing a substrate;

forming a first electrode on the substrate;

forming a first dielectric layer on the first electrode;

patterning the first dielectric layer to form a dielectric pillar, wherein the top view of the dielectric pillar is circle or polygon;

conformally forming a phase-change material to cover the dielectric pillar and etching back the phase-change material to remove phase-change material on the top surface of the dielectric pillar and first electrode,

remaining a phase-change material spacer on the side walls of the dielectric pillar;

forming a second dielectric layer on the substrate and subjected to a back-etched, covering the sidewalls of the phase-change material spacer; and

forming a second electrode on the dielectric pillar and second dielectric layer electrically connect to the phase-change material.

6 . The method as claimed in claim 5 , wherein the phase-change material spacer has a width of 2 nm˜120 nm and a height of 1 mm˜200 nm.

7 . The method as claimed in claim 5 , wherein at least one of the first electrode and the second electrode comprises phase-change material.

8 . The method as claimed in claim 5 , wherein the top view of the phase-change material spacer is closed curve.

9 . The method as claimed in claim 5 , after forming the phase-change material spacer, further comprising:

patterning the phase-change material spacer to form a non-continuous phase-change material spacer.

10 . The method as claimed in claim 5 , after forming the second electrode, further comprising:

patterning the first electrode and the second electrode with the substrate acting as a etching-stop, and blanketly forming a third dielectric layer to surround the electrodes.

11 . The method as claimed in claim 5 , wherein the first electrode and the second electrode are patterned by different patterning processes.

12 . The method as claimed in claim 5 , wherein the dielectric pillar has a width of 20 nm˜500 nm.

13 . A method for fabricating phase-change memory element, comprising

providing a substrate;

forming a first electrode on the substrate;

forming a first dielectric layer on the first electrode;

patterning the first dielectric layer to form an opening, wherein the top view of the opening is circle or polygon;

conformally forming a phase-change material on the first dielectric layer to cover the opening and etching back the phase-change material to remain a phase-change material spacer on the side walls of the opening;

forming a second dielectric layer on the substrate and subjected to a back-etched, covering the sidewalls of the phase-change material spacer; and

forming a second electrode on the opening and the second dielectric layer to electrically connect to the phase-change material spacer.

14 . The method as claimed in claim 13 , wherein the phase-change material spacer has a width of 2 nm˜120 nm and a height of 1 nm˜200 nm.

15 . The method as claimed in claim 13 , wherein at least one of the first electrode and the second electrode comprises phase-change material.

16 . The method as claimed in claim 13 , wherein the top view of the phase-change material spacer is closed curve.

17 . The method as claimed in claim 13 , after forming the phase-change material spacer, further comprising:

patterning the phase-change material spacer to form a non-continuous phase-change material spacer.

18 . The method as claimed in claim 13 , after forming the second electrode, further comprising:

patterning the first electrode and the second electrode with the substrate acting as a etching-stop, and blanketly forming a third dielectric layer to surround the electrodes.

19 . The method as claimed in claim 13 , wherein the first electrode and the second electrode are patterned by different patterning processes.

20 . The method as claimed in claim 13 , wherein the opening has a width of 20 mm˜500 nm.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2010
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE; POWERCHIP SEMICONDUCTOR CORP.; NANYA TECHNOLOGY CORPORATION; PROMOS TECHNOLOGIES INC.; WINBOND ELECTRONICS CORP.
To: PROMOS TECHNOLOGIES INC.
Reel/Frame 024061/0347 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2008
From: CHUO, YEN; HSU, HONG-HUI
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE; POWERCHIP SEMICONDUCTOR CORP.; NANYA TECHNOLOGY CORPORATION; PROMOS TECHNOLOGIES INC.; WINBOND ELECTRONICS CORP.
Reel/Frame 020943/0344 →