IP Library Granted Patent US 7,576,526
Granted Patent B2
US 7,576,526 · App. 12/014,809 · Granted Aug 18, 2009

Overcurrent detection circuit

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Quick Facts
Patent No.
US 7,576,526
App. No.
12/014,809
Granted
Aug 18, 2009
Kind
B2
Abstract

A circuit for detecting overcurrent flowing to an output transistor. A replica transistor generates a reference voltage that is in accordance with a reference current flowing from a constant current circuit. A voltage-current conversion circuit generates a determination reference current proportional to the reference current based on the reference voltage. A current-voltage conversion circuit converts the determination reference current to a determination reference voltage. A detector detects overcurrent flowing to the output transistor based on the determination reference voltage.

Claims (68)

1. An overcurrent detection circuit for detecting overcurrent flowing to an output transistor, the overcurrent detection circuit comprising:

a constant current circuit for generating a reference current;

a replica transistor, connected to the constant current circuit, for generating a reference voltage that is in accordance with the reference current;

a voltage-current conversion circuit, connected to the constant current circuit and the replica transistor, for generating a determination reference current that is proportional to the reference current based on the reference voltage;

a current-voltage conversion circuit, connected to the voltage-current conversion circuit, for converting the determination reference current to a determination reference voltage; and

a detector, connected to the current-voltage conversion circuit, for detecting the overcurrent flowing to the output transistor based on the determination reference voltage.

2. The overcurrent detection circuit of claim 1 , wherein the determination reference current is smaller than the overcurrent detected by the detector.

3. The overcurrent detection circuit of claim 1 , wherein:

the output transistor is of a predetermined conductance type and has a predetermined size; and

the replica transistor has the same conductance type as the output transistor and is smaller than the output transistor.

4. The overcurrent detection circuit of claim 3 , wherein:

the output transistor has a first element size;

the replica transistor has a second element size;

the voltage-current conversion circuit includes a first resistor circuit having a first resistance;

the current-voltage conversion circuit includes a second resistor circuit having a second resistance; and

the determination reference voltage is determined by the first element size, the second element size, the first resistance, the second resistance, and the reference current.

5. The overcurrent detection circuit of claim 1 , further comprising:

a timing control circuit, connected to the output transistor and the detector, for controlling the timing for supplying the detector with a detection voltage corresponding to the current flowing to the output transistor.

6. The overcurrent detection circuit according to claim 5 , wherein the timing control circuit supplies the detector with the detection voltage corresponding to the current flowing to the output transistor when the output transistor is activated.

7. The overcurrent detection circuit of claim 6 , wherein the timing control circuit fixes the detection voltage at a predetermined level when the output transistor is deactivated.

8. The overcurrent detection circuit of claim 5 , wherein the timing control circuit includes:

a delay circuit for delaying a drive signal that drives the output transistor and generating a delayed drive signal;

a logic gate, connected to the delay circuit, for performing a logical operation on the drive signal and the delayed drive signal to generate a timing signal; and

a switch circuit, connected to the output transistor, the logic gate, and the detector, for supplying the detector with the detection voltage in response to the timing signal.

9. The overcurrent detection circuit of claim 8 , wherein the timing control circuit further includes:

a voltage stabilizing circuit connected to the switch circuit and the detector.

10. The overcurrent detection circuit of claim 9 , wherein the voltage stabilizing circuit is a pull-up circuit or a pull-down circuit.

11. The overcurrent detection circuit of claim 1 , wherein:

the voltage-current conversion circuit includes:

an operational amplifier for generating a control voltage based on the reference voltage and a feedback voltage;

a current control transistor connected to the operational amplifier and driven by the control voltage; and

a first resistor circuit connected to the operational amplifier and the current control transistor, the feedback voltage being generated at a node between the current control transistor and the first resistor circuit; and

the determination reference current flows through the current control transistor and the first resistor circuit.

12. The overcurrent detection circuit of claim 1 , further comprising:

a second current-voltage conversion circuit, connected to the voltage-current conversion circuit and the current-voltage conversion circuit, for generating a second determination reference voltage based on the determination reference voltage; and

a second detector, connected to the second current-voltage conversion circuit, for detecting an overcurrent flowing to the output transistor based on the second determination reference voltage, wherein the first detector detects a first overcurrent flowing to the output transistor, and the second detector detects a second overcurrent flowing to the output transistor.

13. A power supply circuit comprising:

a first side transistor;

a second side transistor connected in series to the first side transistor;

a DC-DC controller for generating first and second drive signals that drive the first and second side transistors in a complementary manner;

a constant current circuit for generating a reference current;

a replica transistor, connected to the constant current circuit, for generating a reference voltage that is in accordance with the reference current;

a voltage-current conversion circuit, connected to the constant current circuit and the replica transistor, for generating a determination reference current proportional to the reference current based on the reference voltage;

a first side current-voltage conversion circuit, connected to the voltage-current conversion circuit, for converting the determination reference current to a first side reference voltage; and

a first side detector, connected to the first side current-voltage conversion circuit, for detecting current flowing to the first side transistor based on the first side reference voltage.

14. The power supply circuit of claim 13 , further comprising:

a first timing control circuit, connected to the first side transistor and the first side detector, for controlling the timing for supplying the first side detector with a first detection voltage corresponding to the current flowing to the first side transistor.

15. The power supply circuit of claim 14 , further comprising:

a second side current-voltage conversion circuit, connected to the voltage-current conversion circuit, for converting the determination reference current to a second side reference voltage; and

a second side detector, connected to the second side current-voltage conversion circuit, for detecting overcurrent flowing to the second side transistor based on the second side reference voltage.

16. The power supply circuit of claim 15 , wherein:

the first side transistor and the second side transistor each have a predetermined conductance type and a predetermined size; and

the replica transistor has the same conductance type as the first and second side transistors and is smaller than the first and second transistors.

17. The power supply circuit of claim 15 , further comprising:

a second timing control circuit, connected to the second side transistor and the second side detector, for controlling the timing for supplying the second side detector with a second detection voltage corresponding to the current flowing to the second side transistor.

18. A multi-channel DC-DC converter comprising:

a reference current generation circuit for generating a determination reference current;

a current mirror circuit, connected to the reference current generation circuit, for generating a plurality of determination reference currents proportional to the determination reference current; and

a plurality of DC-DC converters connected to the current mirror circuit;

wherein the reference current generation circuit includes:

a constant current circuit for generating a reference current;

a replica transistor, connected to the constant current circuit, for generating a reference voltage that is in accordance with the reference current; and

a voltage-current conversion circuit, connected to the constant current circuit and the replica transistor, for generating the determination reference current that is proportional to the reference current based on the reference voltage; and

wherein the plurality of DC-DC converters each include:

an output transistor; and

a detection unit for detecting current flowing to the output transistor, the detection unit including:

a current-voltage conversion circuit, connected to the current mirror circuit, for converting one of the plurality of determination reference currents to a determination reference voltage; and

a detector, connected to the current-voltage conversion circuit, for detecting overcurrent flowing to the output transistor based on the determination reference voltage.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0688 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0854 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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SECURITY AGREEMENT Recorded Jul 7, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021194/0593 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2008
From: KIMURA, HIROYUKI
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 020426/0697 →