IP Library Granted Patent US 8,563,355
Granted Patent B2
US 8,563,355 · App. 12/016,739 · Granted Oct 22, 2013

Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET

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Quick Facts
Patent No.
US 8,563,355
App. No.
12/016,739
Granted
Oct 22, 2013
Kind
B2
Abstract

A phase change memory (PCM) cell includes a transistor, a PCM structure, and a heater. The transistor has a first current electrode and a second current electrode in a structure, and a channel region having a first portion along a first sidewall of the structure and having a second portion along a second sidewall of the structure. The second sidewall is opposite the first sidewall. The transistor has a control electrode that has a first portion adjacent to the first sidewall and a second portion adjacent to the second sidewall. The PCM structure exhibits first and second resistive values when in first and second phase states, respectively. The heater is on the structure and produces heat when current flows through the heater for changing the phase state of the phase change structure.

Claims (27)

1. A method of making a circuit including a phase change memory cell, the method comprising:

forming a structure including silicon;

forming a transistor, the transistor including a channel region having a first portion located along a first sidewall of the structure including silicon and having a second portion located along a second sidewall of the structure including silicon, the second sidewall being an opposing sidewall to the first sidewall, wherein the forming the transistor includes:

forming a control electrode, the control electrode having a first portion adjacent to the first sidewall for controlling conductivity in the first portion of the channel region and a second portion adjacent to the second sidewall for controlling conductivity in the second portion of the channel region; and

forming a first current electrode in the structure including silicon and forming a second current electrode in the structure including silicon;

forming a separation region in the structure including silicon between the first current electrode and a contact region to form a contact sidewall on the first current electrode in the separation region;

forming a heater comprising forming a heater silicide adjacent to the contact sidewall in the separation region; and

after forming the heater, forming a phase change structure in the opening in contact with the heater silicide wherein the phase change structure exhibits a first resistive value when in a first phase state and exhibits a second resistive value when in a second phase state, wherein the phase change structure wraps around a pointed corner of the heater.

2. The method of claim 1 wherein the forming the heater silicide includes:

siliciding the contact sidewall.

3. The method of claim 1 wherein the forming the phase change structure includes forming a layer of phase change material over a wafer, the wafer including the structure, the method further comprising:

patterning the layer to leave the phase change structure in the separation region.

4. The method of claim 1 wherein the heater silicide includes cobalt.

5. The method of claim 1 wherein the forming the structure including silicon includes forming the structure including silicon having a first width, oxidizing the silicon structure to form an oxidized layer, and removing the oxidized layer, wherein first width is reduced by the oxidizing.

6. A method of forming a phase change memory cell, the method comprising:

providing a wafer having a layer including silicon located over an insulating layer;

forming a first structure including silicon and a second structure including silicon physically separated from the first structure including silicon, wherein the forming includes removing material from the layer including silicon at a location between the first structure including silicon and the second structure including silicon to form a separation region between the first structure and the second structure by which a contact sidewall is formed on a first current electrode in the separation region;

forming a transistor, the transistor including a channel region having a first portion located along a first sidewall of the first structure including silicon and having a second portion located along a second sidewall of the first structure including silicon, the second sidewall being an opposing sidewall to the first sidewall, wherein the forming the transistor includes:

forming a control electrode, the control electrode having a first portion adjacent to the first sidewall for controlling conductivity in the first portion of the channel region and a second portion adjacent to the second sidewall for controlling conductivity in the second portion of the channel region;

forming the first current electrode in the first structure including silicon and forming a second current electrode in the first structure including silicon;

forming a heater comprising forming a heater silicide adjacent to the contact sidewall in the separation region and over a portion of the first current electrode;

forming a phase change memory cell electrically coupled to the transistor by the heater along the contact sidewall, the transistor controlling current for changing a phase state of the phase change memory cell, the forming the phase change memory cell includes:

after forming the heater, forming a phase change structure in the separation and in contact with the heater along the contact sidewall and in contact with the heater over the first current electrode wherein the phase change structure exhibits a first resistive value when in a first phase state and exhibits a second resistive value when in a second phase state.

7. The method of claim 6 wherein the heater includes first and second sidewall silicide portions and the heater wraps around a corner of the silicide portions.

8. The method of claim 6 wherein the forming the heater silicide includes siliciding a second portion of the first structure to form a third silicide structure, wherein the third silicide structure physically contacts the first current electrode.

9. The method of claim 6 wherein the heater includes cobalt.

10. The method of claim 6 wherein a thickness of the phase change structure over the portion of the first current electrode is more than half and less than a full thickness of the phase change structure in the separation region.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0688 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →