IP Library Granted Patent US 9,317,981
Granted Patent B2
US 9,317,981 · App. 12/018,023 · Granted Apr 19, 2016

Method and device for protecting products against counterfeiting

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Quick Facts
Patent No.
US 9,317,981
App. No.
12/018,023
Granted
Apr 19, 2016
Kind
B2
Abstract

A method for protecting a product against counterfeiting is provided that has a transponder associated with the product, upon which at least one unique identifier is stored, wherein a flag in a set or cleared state is associated with the identifier, and when the flag is set, read access to the identifier by a reader is only permitted after authentication. The invention further relates to a transponder for protecting a product against counterfeiting.

Claims (51)

1. A method comprising:

receiving a request to access a first unique identifier stored in a shadow memory area of a transponder, read access to the first identifier being based on a state of a flag and on knowledge of secret shadow memory access information, the transponder having a second unique identifier stored in a second memory area;

requiring authentication prior to permitting read access to the first identifier in response to the state of the flag having a first value; and

permitting read access to the first identifier when the request includes the secret shadow memory access information.

2. The method of claim 1 further comprising preventing overwriting the state of the flag by writing the flag in a non-reprogrammable memory area.

3. The method of claim 1 further comprising analyzing a bit of the first identifier used to emulate the state of the flag.

4. The method of claim 3 , wherein analyzing at least one bit of the first identifier comprises combining the bit of the at least one unique identifier with a clock signal.

5. The method of claim 1 further comprising detecting manipulation of the first identifier through a state of a check digit associated with the identifier.

6. The method of claim 1 wherein the first identifier stored in the shadow memory area is encrypted.

7. The method of claim 1 further comprising constructing a portion of the second identifier using the first identifier.

8. The method of claim 1 , wherein the secret shadow memory access information comprises one or more of:

a secret memory address; and

a secret access command.

9. The method of claim 1 , further comprising:

receiving a request to access the second unique identifier stored in the second memory area of the transponder, read access to the second identifier being based on the state of the flag; and

requiring authentication prior to permitting read access to the second identifier in response to the state of the flag having a first value.

10. A transponder comprising:

a shadow memory area storing a first unique identifier, read access to the first identifier being based on a state of a flag and on knowledge of secret shadow memory access information;

a second memory area storing a second unique identifier; and

one or more computer-readable non-transitory storage media coupled to the memory areas that embody logic that is operable when executed to:

receive a request to access the first identifier stored in the shadow memory area;

require authentication prior to permitting read access to the first identifier in response to the state of the flag having a first value; and

permit read access to the first identifier when the request includes the secret shadow memory access information.

11. The transponder of claim 10 , wherein the logic is further operable to prevent overwriting of the state of the flag by writing the flag in a non-reprogrammable memory area.

12. The transponder of claim 10 , wherein the logic is further operable to analyze a bit of the first identifier used to emulate the state of the flag.

13. The transponder of claim 12 , wherein the logic to analyze at least one bit of the first identifier is further operable to combine the bit of the at least one unique identifier with a clock signal.

14. The transponder of claim 10 , wherein the logic is further operable to detect manipulation of the first identifier-through a state of a check digit associated with the at least one unique identifier.

15. The transponder of claim 10 , wherein the first identifier stored in the shadow memory area is encrypted.

16. The transponder of claim 10 , wherein a portion of the second identifier is constructed using the first identifier.

17. The transponder of claim 10 , wherein the secret shadow memory access information comprises one or more of:

a secret memory address; and

a secret access command.

18. The transponder of claim 10 , wherein the logic is further operable to:

receive a request to access the second unique identifier stored in the second memory area of the transponder, read access to the second identifier being based on the state of the flag; and

require authentication prior to permitting read access to the second identifier in response to the state of the flag having a first value.

19. One or more non-transitory computer-readable storage media that embody logic that is operable when executed to:

receive a request to access a first unique identifier stored in a shadow memory area of a transponder, read access to the at least one unique identifier being based on a state of a flag and on knowledge of secret shadow memory access information, the transponder having a second unique identifier stored in a second memory area;

require authentication prior to permitting read access to the first identifier in response to the state of the flag having a first value; and

permit read access to the first identifier when the request includes the secret shadow memory access information.

20. The one or more non-transitory computer-readable storage media of claim 19 wherein the logic when executed is further operable to prevent overwriting the state of the flag by writing the flag in a non-reprogrammable memory area.

21. The one or more non-transitory computer-readable storage media of claim 19 , wherein the logic when executed is further operable to analyze a bit of the first identifier used to emulate the state of the flag.

22. The one or more non-transitory computer-readable storage media of claim 21 , wherein analyzing at least one bit of the first identifier further comprises combining the at least one bit of the first identifier with a clock signal.

23. The one or more non-transitory computer-readable storage media of claim 19 , wherein the logic when executed is further operable to detect manipulation of the first identifier through a state of a check digit associated with the first identifier.

24. The one or more non-transitory computer-readable storage media of claim 19 , wherein the first identifier stored in the shadow memory area is encrypted.

25. The one or more non-transitory computer-readable storage media of claim 19 , wherein a portion of the second identifier is constructed using the first identifier.

26. The one or more non-transitory computer readable storage media of claim 19 , wherein the secret shadow memory access information comprises one or more of:

a secret memory address; and

a secret access command.

27. The one or more non-transitory computer-readable storage media of claim 19 , wherein the logic when executed is further operable to:

receive a request to access the second unique identifier stored in the second memory area of the transponder, read access to the second identifier being based on the state of the flag; and

require authentication prior to permitting read access to the second identifier in response to the state of the flag having a first value.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2011
From: ATMEL AUTOMOTIVE GMBH
To: ATMEL CORPORATION
Reel/Frame 025899/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2009
From: ATMEL GERMANY GMBH
To: ATMEL AUTOMOTIVE GMBH
Reel/Frame 023205/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2008
From: FRIEDRICH, ULRICH
To: ATMEL GERMANY GMBH
Reel/Frame 020920/0366 →