Regulator circuit
View Patent ↗A regulator circuit for efficiently and accurately outputting a target voltage with a simple circuit configuration. The regulator circuit includes an output circuit, a comparator, a counter block, a latch block, and a decoder block. When the target voltage is applied to an output terminal of the output circuit, the output circuit supplies the comparator with feedback voltage. Further, the feedback signal is provided to the counter block. The counter block performs counting in correspondence with the feedback signal. The latch block holds the signal acquired from the counter block and provides the held signal to the decoder block. The decoder block supplies the comparator with reference voltage. The comparator compares the reference voltage and the feedback voltage and controls the counting.
1. A regulator circuit comprising:
a comparison means for comparing a reference voltage and a feedback voltage, which is generated from a target voltage input to an output terminal, and outputting a comparison result;
an output means including an output control element for controlling a drive voltage based on the comparison result and supplying the output terminal with an output voltage, wherein the output means generates and outputs the feedback signal in accordance with the output of the control element;
a counting means for counting the feedback signal output from the output means and outputting a count signal;
a latching means for holding and outputting the count signal output from the counting means; and
a conversion means for converting the counter signal output from the latching means to a reference voltage and supplying the reference voltage to the comparison means.
2. The regulator circuit according to claim 1 , wherein the output means includes:
a first transistor and a second transistor of which source terminals are supplied with the drive voltage;
a constant current source connected to a drain terminal of the first transistor, wherein the feedback signal is generated at a connection node between the drain terminal and the constant current source;
the output terminal arranged at the drain terminal of the second transistor that serves as the output control element; and
a resistor connected to the drain terminal of the second transistor for generating the feedback voltage.
3. The regulator circuit according to claim 1 , wherein the latching means includes a signal holding means for acquiring a hold signal and temporarily holding the count signal output from the counting means based on the hold signal.
4. The regulator circuit according to claim 1 , wherein the latching means includes a signal fixing means for acquiring a write signal and permanently storing the count signal output from the counting means based on the write signal.
5. The regulator circuit according to claim 1 , wherein the latching means acquires a hold signal or a write signal and includes:
a signal holding means for temporarily holding the count signal output from the counting means based on the hold signal;
a signal fixing means for permanently storing the count signal output from the counting means based on the write signal; and
a selection means for selectively outputting one of an output signal of the signal holding means and an output signal of the signal fixing means.
6. A regulator circuit, comprising:
a comparator for comparing a reference voltage and a feedback voltage, wherein the feedback voltage is generated from a target voltage at an output terminal, and outputting a comparison result;
an output circuit including an output control element for controlling a drive voltage based on the comparison result and supplying the output terminal with an output voltage, wherein the output circuit generates and outputs the feedback voltage in accordance with the output voltage output by the output control element;
a counter, connected to the output circuit, for counting a feedback voltage signal and generating a count signal;
a latch, connected to the counter, for holding and outputting the count signal; and
a decoder connected to the latch for converting the counter signal output by the latch to the reference voltage and supplying the reference voltage to the comparator.
7. The regulator circuit of claim 6 , wherein the output circuit further comprises:
first and second transistors having source terminals that are supplied with the drive voltage;
a constant current source connected to a drain terminal of the first transistor, wherein the feedback signal is generated at a connection node between the drain terminal of the first transistor and the constant current source;
wherein the output terminal is arranged at the drain terminal of the second transistor, which serves as the output control element; and
a resistor connected to the drain terminal of the second transistor for generating the feedback voltage.
8. The regulator circuit of claim 6 , wherein the latch includes a signal holding circuit for acquiring a hold signal and temporarily holding the count signal output by the counter based on the hold signal.
9. The regulator circuit of claim 6 , wherein the latch includes a signal fixing circuit for acquiring a write signal and storing the count signal output from the counter based on the write signal.
10. The regulator circuit of claim 6 , wherein the latch acquires one of a hold signal and a write signal, the latch further comprising:
a signal holding circuit for temporarily holding the count signal output by the counter based on the hold signal;
a signal fixing circuit for storing the count signal based on the write signal; and
a selector for selectively outputting one of an output signal of the signal holding circuit and an output signal of the signal fixing circuit.
11. A regulator circuit, comprising:
a comparator for comparing a reference voltage and a feedback voltage, and outputting a comparison result;
an output circuit for controlling a drive voltage based on the comparison result and supplying an output terminal with an output voltage, wherein the output circuit generates and outputs the feedback voltage and a feedback voltage signal in accordance with the output voltage;
a counter, connected to the output circuit, for counting the feedback voltage signal and generating a count signal;
a latch, connected to the counter, for holding and outputting the count signal; and
a decoder connected to the latch for converting the counter signal output by the latch to the reference voltage and supplying the reference voltage to the comparator,
wherein the output circuit comprises:
first and second transistors having source terminals supplied with the drive voltage, and gate terminals connected comparator and receiving the comparison result;
a constant current source connected to a drain terminal of the first transistor, where the feedback voltage is generated at a node between the constant current source and the drain terminal of the first transistor; and
a first and second resistors connected in series between the drain terminal of the second transistor and ground, wherein the feedback voltage is generated at a node between the first and second resistors.