Electrostatic discharge protection
View Patent ↗An electrostatic discharge (ESD) protection device ( 61, 71 ), coupled across input-output (I/O) ( 22 ) and common ( 23 ) terminals of a core circuit ( 24 ) that it is intended to protect from ESD events, comprises, multiple serially coupled ESD clamp stages ( 41, 41′ ), each stage ( 41, 41′ ) comprising an interior node ( 52, 52′ ) and first ( 32, 32′ ) and second terminal ( 42, 42′ ) nodes wherein the first terminal node ( 42 ) of the first clamp stage ( 41 ) is coupled to the common terminal ( 23 ) and the second terminal node ( 42′ ) of the last clamp stages ( 41′ ) is coupled to the I/O terminals ( 22 ). A resistance-capacitance ladder ( 60 ) is provided in parallel with some of the clamp stages ( 41, 41′ ), with a resistance (R 1 , R 2 , R 3 etc.) coupled to each of the nodes ( 32, 52, 65 ( 42; 32′ )) of one of the ESD clamp stages ( 41, 41′ ) by first terminals thereof and capacitors (C 1 , C 2 , etc.) are coupled between second terminals of the resistances (R 1 , R 2 , R 3 etc.). The clamp stages ( 41, 41′ ) are desirably bi-directional and a diode (D 1 ) may bridge one or more of the clamp stages (e.g., 41 ) to provide different clamp voltages for different polarity ESD events.
1. An electrostatic discharge (ESD) protection circuit, having an input/output (I/O) terminal and a common terminal, adapted to protect a circuit core coupled between the I/O and common terminals, and comprising:
multiple serially arranged ESD clamp stages coupled between the I/O terminal and the common terminal; and
a resistance-capacitance (RC) ladder in parallel with at least a part of the multiple serially arranged ESD clamp stages and with resistances of the RC ladder coupled to nodes of the serially arranged ESD clamp stages.
2. The circuit of claim 1 , wherein the multiple serially arranged ESD clamp stages comprise first and second serially arranged ESD clamp stages and the nodes comprise a first node at a first terminal of the first ESD clamp stages, a second node internal to the first ESD clamp stage and a third node serially coupling a second terminal of the first ESD clamp stage to a first terminal of the second ESD clamp stage, a fourth node internal to the second ESD clamp stage and a fifth node at an end terminal of the second ESD clamp stage, wherein the first node is coupled to the common terminal and the fifth node is coupled to the I/O terminal.
3. The circuit of claim 2 , wherein the RC ladder comprises first, second and third resistances and first and second capacitances, wherein a first terminal of the first resistance is coupled to the first node, a first terminal of the second resistance is coupled to the second node and a first terminal of the third resistance is coupled to the third node and the first capacitance is coupled between second terminals of the first and second resistances and the second capacitance is coupled between second terminals of the second and third resistances.
4. The circuit of claim 2 , further comprising a diode coupled between the first and third nodes.
5. The circuit of claim 2 , further comprising a fourth resistance and a third capacitance, the fourth resistance having a first terminal thereof coupled to the fourth node and the third capacitance is coupled between the second terminal of the third resistance and a second terminal of the fourth resistance.
6. The circuit of claim 2 , further comprising a fifth resistance and a fourth capacitance, the fifth resistance having a first terminal thereof coupled to the fifth node and the fourth capacitance coupled between the second terminal of the fourth resistance and a second terminal of the fifth resistance.
7. The circuit of claim 1 , wherein at least some of the multiple serially arranged ESD clamp stages are bi-directional.
8. The circuit of claim 7 , further comprising a diode coupled across at least one of the multiple serially arranged bi-directional ESD clamp stages.
9. An electrostatic discharge (ESD) protection device, coupled across input-output (I/O) and common terminals of a core circuit that it is intended to protect from ESD events, comprising:
first through N serially coupled bi-directional ESD clamp stages, each of the N ESD clamp stages comprising first and second terminal nodes and an interior node, wherein the first terminal node of the first ESD clamp stage is coupled to the common terminal, the second terminal node of the N th ESD clamp stages is coupled to the I/O terminal and 2 nd through the N th ESD clamp stages have first terminal nodes coupled to second terminal nodes of an immediately preceding ESD clamp stage, thereby forming N−1 coupling nodes between adjacent pairs of the first through N serially coupled ESD clamp stages; and
a resistance-capacitance (RC) ladder with multiple resistances and capacitances, wherein the resistances have first terminals coupled to at least some of the nodes of the ESD clamp stages and the capacitances are coupled between second terminals of successive resistances of the RC ladder.
10. The device of claim 9 , wherein first terminals of the resistances are coupled to the first node of the first ESD clamp stage, to the interior nodes of the N ESD clamp stages, to the second node of the N th ESD clamp stage, and to the N−1 coupling nodes between successive serially coupled ESD stages, one resistance per node, and the capacitances are coupled between second terminals of successive resistances of the RC ladder.
11. The device of claim 10 , wherein the resistance having a first terminal coupled to the second node of the N th ESD clamp stage and the capacitance coupled to the second terminal of such resistance, or the resistance having a first terminal coupled to the interior node of the N th ESD stage and capacitance coupled to the second terminal of such resistance, or both such resistances and capacitances, are omitted.
12. The device of claim 9 , further comprising a diode coupled across first and second terminal nodes of one or more of the N serially coupled bi-directional ESD clamp stages.
13. The device of claim 11 , wherein the diode is coupled across first and second terminal nodes of the first ESD clamp stage.
14. An electrostatic discharge (ESD) protection device, coupled across input-output (I/O) and common terminals of a core circuit that it is intended to protect from ESD events, comprising:
N serially coupled ESD clamp stages, each ESD clamp stage comprising first and second terminal nodes and an interior node, wherein the first terminal node of a first of the serially coupled ESD clamp stages is coupled to the common terminal and the second terminal node of the N th serially coupled ESD clamp stage is coupled to the I/O terminal; and
a resistance-capacitance (RC) ladder with a resistance coupled to each of the nodes of one or more of the N ESD clamp stages by first terminals of the resistances and capacitors coupled between second terminals of the resistances.
15. The device of claim 14 , wherein each ESD clamp stage comprises first and second transistor stages serially coupled in mirror configuration, each transistor stage having emitter, base and collector, and wherein the interior node of each ESD clamp stage couples the collectors of the first and second transistor stages.
16. The device of claim 15 , wherein emitters of the first and second transistor stages are coupled respectively to the first and second terminal nodes of each ESD clamp stages.
17. The device of claim 15 , further comprising a Zener diode coupled between the collector and base of each transistor stage.
18. The device of claim 15 , wherein an emitter of the first transistor stage of a first of the N ESD clamp stages is coupled to the common terminal and an emitter of the second transistor stage of the N th ESD clamp stage is coupled to the I/O terminal.
19. The device of claim 14 , wherein the resistances of the RC ladder have substantially similar values and the capacitances of the RC ladder have substantially similar values.
20. The device of claim 14 , further comprising a diode coupled across the first and second terminal nodes of one of the ESD clamp stages.