IP Library Granted Patent US 7,838,904
Granted Patent B2
US 7,838,904 · App. 12/023,461 · Granted Nov 23, 2010

Nitride based semiconductor device with concave gate region

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Quick Facts
Patent No.
US 7,838,904
App. No.
12/023,461
Granted
Nov 23, 2010
Kind
B2
Abstract

In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion.

Claims (26)

1. A semiconductor device comprising:

a substrate;

a semiconductor multilayer having a first nitride-based compound semiconductor layer provided over the substrate and a second nitride-based compound semiconductor layer provided over the first nitride-based compound semiconductor layer to have a band gap larger than that of the first nitride-based compound semiconductor layer;

a source electrode and a drain electrode each provided to have at least a portion thereof in contact with the semiconductor multilayer,

a concave portion provided on an upper surface of the semiconductor multilayer to be located between the source electrode and the drain electrode, and concaved in a thickness direction of the semiconductor multilayer;

a gate electrode provided over the concave portion to cover an opening of the concave portion; and

a p-type nitride-based compound semiconductor layer provided to cover the opening of the concave portion and to be located between the gate electrode and the semiconductor multilayer,

wherein the p-type nitride-based compound semiconductor layer works as a part of a terminal for controlling a current between the source and the drain by applying a voltage, and

a film thickness of a portion of the p-type nitride-based compound semiconductor layer located over a bottom surface of the concave portion is larger than a film thickness of a portion of the p-type nitride-based compound semiconductor layer located on the upper surface of the semiconductor multilayer.

2. A semiconductor device comprising:

a substrate;

a semiconductor multilayer having a first nitride-based compound semiconductor layer provided over the substrate and a second nitride-based compound semiconductor layer provided over the first nitride-based compound semiconductor layer to have a band gap larger than that of the first nitride-based compound semiconductor layer;

a source electrode and a drain electrode each provided to have at least a portion thereof in contact with the semiconductor multilayer;

a concave portion provided on an upper surface of the semiconductor multilayer to be located between the source electrode and the drain electrode, and concaved in a thickness direction of the semiconductor multilayer;

a gate electrode provided over the concave portion to cover an opening of the concave portion; and

an insulating film in contact with a portion of the upper surface of the semiconductor multilayer and opened to expose the concave portion, wherein

the gate electrode has a portion thereof provided over the insulating film.

3. The semiconductor device of claim 2 , wherein a fourth insulating film is provided to be in contact with a bottom surface of the concave portion and located between the gate electrode and the insulating film.

4. A semiconductor device comprising:

a substrate;

a semiconductor multilayer having a first nitride-based compound semiconductor layer provided over the substrate and a second nitride-based compound semiconductor layer provided over the first nitride-based compound semiconductor layer to have a band gap larger than that of the first nitride-based compound semiconductor layer;

a source electrode and a drain electrode each provided to have at least a portion thereof in contact with the semiconductor multilayer;

a concave portion provided on an upper surface of the semiconductor multilayer to be located between the source electrode and the drain electrode, and concaved in a thickness direction of the semiconductor multilayer; and

a gate electrode provided over the concave portion to cover an opening of the concave portion

wherein the semiconductor multilayer further has an n-type nitride-based compound semiconductor layer provided as an uppermost layer over the second nitride-based compound semiconductor layer, and

at least one of a portion of the n-type nitride-based compound semiconductor layer located between the gate electrode and the source electrode and a portion of the n-type nitride-based compound semiconductor layer located between the gate electrode and the drain electrode is removed.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2025
From: INFINEON TECHNOLOGIES AUSTRIA AG
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 072853/0508 →
CHANGE OF NAME Recorded Dec 13, 2024
From: PANASONIC CORPORATION
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 069631/0392 →
CHANGE OF NAME Recorded Nov 21, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0606 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2008
From: NAKAZAWA, KAZUSHI; NAKAZAWA, SATOSHI; UEDA, TETSUZO; TANAKA, TSUYOSHI; HIKITA, MASAHIRO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 021005/0859 →