Method of making transistor gates with controlled work function

1. A method of making an integrated circuit comprising:

providing a substrate;

forming a structured layer stack on the substrate for a gate of a transistor, the structured layer stack comprising a dielectric layer formed on the substrate, an oxide-free metallic layer formed on the dielectric layer, the metallic layer comprising a transition metal, and a metal oxide layer formed on the metallic layer comprising a first transition metal oxide compound; and

oxidizing the metallic layer, thereby increasing a work function of the metallic layer, wherein oxidizing the metallic layer comprises performing a temperature step to cause a diffusion of oxygen from the metal oxide layer into the metallic layer and a formation of a second transition metal oxide compound in the metallic layer, and

wherein the second transition metal oxide compound has a higher binding energy than the first transition metal oxide compound.

2. The method according to claim 1 , wherein the structured layer stack is formed comprising a conductive layer on the metal oxide layer.

3. The method according to claim 2 , wherein the conductive layer comprises tungsten, aluminum, copper or tungsten nitride.

4. The method according to claim 1 , wherein the temperature step is performed at a temperature in a range of up to 1300° C.

5. The method according to claim 1 , further comprising forming two doped regions in the substrate each of the two doped regions forming one of a source and drain of the transistor.

6. The method according to claim 5 , wherein the two doped regions are formed prior to oxidizing the metallic layer.

7. The method according to claim 1 , wherein the structured layer stack further comprises sidewalls and dielectric spacers at the sidewalls.

8. The method according to claim 1 , wherein the metallic layer comprises one of Ta, Nb, V, W, Mo, Ru, Ir, Re, Os, Rh, Pd, Ni, Co.

9. The method according to claim 1 , wherein the transition metal of the metallic layer is present in one of the following forms: a pure metal, a carbide, a nitride and a carbonitride.

10. The method according to claim 1 , wherein the dielectric layer comprises a high-k dielectric.

11. The method according to claim 1 , wherein the method is used to make a p-FET.

12. A method of making an integrated circuit comprising:

providing a substrate;

forming a structured layer stack on the substrate for a gate of a transistor, the structured layer stack comprising a dielectric layer formed on the substrate, an oxide-free metallic layer comprising a transition metal formed on the dielectric layer, a metal oxide layer formed on the metallic layer, and a conductive layer formed on the metal oxide layer, the conductive layer having a lower oxygen affinity compared to the metal oxide layer; and

oxidizing the metallic layer, thereby increasing a work function of the metallic layer, wherein oxidizing the metallic layer comprises performing a temperature step to cause a diffusion of oxygen from the metal oxide layer into the metallic layer.

13. A method of making an integrated circuit comprising:

providing a substrate;

forming a structured layer stack on the substrate for a gate of a transistor, the structured layer stack comprising a dielectric layer formed on the substrate, an oxide-free metallic layer comprising a first transition metal formed on the dielectric layer, a metal oxide layer comprising a second transition metal formed on the metallic layer, wherein the first and second transition metals comprise the same transition metals; and

oxidizing the metallic layer, thereby increasing a work function of the metallic layer, wherein oxidizing the metallic layer comprises performing a temperature step to cause a diffusion of oxygen from the metal oxide layer into the metallic layer.