IP Library Granted Patent US 7,759,753
Granted Patent B2
US 7,759,753 · App. 12/030,213 · Granted Jul 20, 2010

Integrated circuit die, integrated circuit package, and packaging method

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,759,753
App. No.
12/030,213
Granted
Jul 20, 2010
Kind
B2
Abstract

An integrated circuit package includes an integrated circuit die 1 having a plurality of optical elements 5 sensitive to and/or capable of generating light, whereby data communication to circuitry of the integrated circuit die can be effected using a data channels implemented using the plurality of elements. The data channels are along optical pathways provided by an adapter unit 17 mounted on a PCB 19. The adapter unit 17 forms the optical pathways between optical fibers 23 and the respective optical element 5. Thus, there is no requirement to implement expensive wire-bonding as part of the packaging process.

Claims (13)

1. An integrated circuit device, comprising:

an integrated circuit die having outer surfaces and internal electronic circuitry, the electronic circuitry including a plurality of optical elements disposed within but proximate to a major surface of the die, one or more of said optical elements including an optical detector, and one or more of the optical elements including an optical transmitter;

a plurality of electrical contacts coupled with the electronic circuitry;

a laminar support element that supports the integrated circuit die, wherein the laminar support element includes a plurality of vias in register with the plurality of optical elements, the vias allowing light to be transmitted to and from the plurality of optical elements, and wherein the electronic circuitry is powered by electrical power received by way of the electrical contacts, for processing data signals generated by the one or more optical detectors, and to generate data signals for transmission by the one or more optical transmitters; and

a resin body surrounding the outer surfaces of the integrated circuit die not supported by the laminar support element.

2. The integrated circuit device of claim 1 , further comprising:

an adapter unit on which the support element is mounted, the adapter unit comprising optical pathways for transmitting optical signals to the optical detectors through the vias, and receiving optical signals from the optical transmitters through the vias.

3. The integrated circuit device of claim 2 , wherein the adapter unit further comprises electrical paths in contact with the electrical contacts for transmitting electrical power to the electrical contacts.

4. The integrated circuit device of claim 2 , wherein the adapter unit includes a plurality of optical fibres, each optical fibre being in optical communication with at least one corresponding said optical pathway.

5. The integrated circuit device of claim 4 , wherein the adapter unit includes one or more elements for deflecting a beam of light transmitted between one of the optical fibers and a corresponding one of the optical elements.

6. The integrated circuit device according to claim 2 , wherein the adapter unit is mounted on a printed circuit board.

7. The integrated circuit device of claim 6 , further comprising a heat sink element mounted on the printed circuit board and thermally coupled to the integrated circuit die.

8. The integrated circuit device of claim 7 , wherein the heat sink element is thermally coupled to the die by a cured resin layer.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0688 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →