IP Library Granted Patent US 7,572,680
Granted Patent B2
US 7,572,680 · App. 12/033,716 · Granted Aug 11, 2009

Packaged integrated circuit with enhanced thermal dissipation

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Quick Facts
Patent No.
US 7,572,680
App. No.
12/033,716
Granted
Aug 11, 2009
Kind
B2
Abstract

A semiconductor package ( 10 ) uses a plurality of thermal conductors ( 56 - 64 ) that extend upward within an encapsulant ( 16 ) from one or more thermal bond pads ( 22, 24, 26 ) on a die ( 14 ) to disperse heat. The thermal conductors may be bond wires or conductive stud bumps and do not extend beyond a lateral edge of the die. One or more of the thermal conductors may be looped within the encapsulant and exposed at an upper surface of the encapsulant. In one form a heat spreader ( 68 ) is placed overlying the encapsulant for further heat removal. In another form the heat spreader functions as a power or ground terminal directly to points interior to the die via the thermal conductors. Active bond pads may be placed exclusively along the die's periphery or also included within the interior of the die.

Claims (40)

1. A method of packaging an integrated circuit comprising:

providing a semiconductor die comprising a plurality of active bond pads having an electrical function associated therewith and comprising a plurality of thermal bond pads;

locating the plurality of thermal bond pads within an inner region of the semiconductor die;

placing the semiconductor die overlying a substrate;

connecting one or more thermal conductors to each of the plurality of thermal bond pads, each of the one or more thermal conductors extending upward from the semiconductor die, each of the one or more thermal conductors not extending beyond a peripheral edge of the semiconductor die; and

surrounding the semiconductor die, the plurality of thermal bond pads, the plurality of active bond pads and the one or more thermal conductors with an encapsulant to permit the thermal conductors to conduct heat from the semiconductor die to an upper surface of the encapsulant.

2. The method of claim 1 further comprising:

providing at least one conductive heat spreader overlying the one or more thermal conductors for conducting heat from the one or more thermal conductors.

3. The method of claim 2 further comprising:

coupling the conductive heat spreader to at least one of the one or more thermal conductors for use as a signal conductor for either conducting a power supply voltage or providing a ground reference potential to the semiconductor die via the at least one of the one or more thermal conductors.

4. The method of claim 1 further comprising:

locating at least one of the plurality of active bond pads within a central region of the semiconductor die and locating a remainder of the plurality of active bond pads within a peripheral region of the semiconductor die.

5. The method of claim 1 further comprising:

providing at least one of the one or more thermal conductors as a thermal bond wire that forms a loop within the encapsulant and contacts one or more of the plurality of thermal bond pads, the loop reaching an upper surface of the encapsulant.

6. A method of making a packaged integrated circuit comprising:

providing a semiconductor die overlying a substrate, wherein the semiconductor die has active circuitry;

forming a plurality of thermal bond pads over the active circuitry;

forming a plurality of thermal bond wires that are connected to the thermal bond pads and extend upward from the semiconductor die and terminating without extending beyond a perimeter of the semiconductor die; and

surrounding the semiconductor die and the plurality of thermal bond wires with an encapsulant.

7. The method of claim 6 wherein the step of surrounding is further characterized by one or more of the plurality of thermal bond wires extending to an upper surface of the encapsulant.

8. The method of claim 6 wherein the step of forming a plurality of thermal bond wires is further characterized by at least one of the plurality of thermal bond wires being connected to two thermal bond pads by extending from a first of the two thermal bond pads away from a surface of the semiconductor die and returning toward the surface of the semiconductor die to connect to a second of the two thermal bond pads.

9. The method of claim 6 further comprising:

forming a conductive heat spreader overlying at least one of the plurality of thermal bond wires for conducting heat from the at least one of the plurality of thermal bond wires and radiating the heat from the packaged integrated circuit.

10. The method of claim 9 wherein the step of forming the conductive heat spreader is further characterized by at least one of the plurality of thermal bond wires being connected to the at least one conductive heat spreader to function as a power conductor or a ground conductor overlying the semiconductor die.

11. The method of claim 6 wherein the step of forming the plurality of thermal bond pads is further characterized by a portion of the plurality of thermal bond pads not being connected to any active circuitry within the semiconductor die.

12. The method of claim 11 wherein the portion is substantially all of the plurality of thermal bond pads.

13. The method of claim 6 wherein the step of forming the plurality of thermal bond pads is further characterized by at least one of the plurality of thermal bond pads being connected to a power or a ground terminal within the active circuitry.

14. The method of claim 6 further comprising:

forming a plurality of active bond pads positioned around a periphery of the semiconductor die within a pad ring region and electrically connected to respective package bond pads outside the perimeter of the semiconductor die.

15. A method of making a packaged integrated circuit comprising:

providing a semiconductor die overlying a substrate;

forming an active bond pad having an electrical function associated therewith and a first thermal bond pad not having an electrical function associated therewith overlying the semiconductor die;

forming an active conductor and a thermal conductor connected to the active bond pad and the first thermal bond pad, respectively, and extending upward from the semiconductor die; and

surrounding the semiconductor die, the active bond pad, the first thermal bond pad, the active conductor, and the thermal conductor with an encapsulant, whereby the thermal conductor conducts heat from the semiconductor die to an upper surface of the encapsulant.

16. The method of claim 15 wherein the step of forming the active conductor and a thermal conductor is further characterized by the thermal conductor comprising one of a group consisting a conductive stud bump and a bond wire.

17. The method of claim 15 wherein the step of forming the active bond pad and the first thermal bond pad further comprises forming a second thermal bond pad overlying the semiconductor die and wherein the step of forming the active conductor and a thermal conductor is further characterized by the thermal conductor extending from the first thermal bond pad away from the semiconductor die and returning toward the semiconductor die to connect to the second thermal bond pad.

18. The method of claim 15 further comprising:

forming a conductive heat spreader on the upper surface of the encapsulant and contacting the thermal conductor for conducting heat from the thermal conductor.

19. The method of claim 18 wherein the step of forming the conductive heat spreader is further characterized by the conductive heat spreader being a signal conductor for conducting either a power supply voltage or a ground reference potential.

20. The method of claim 15 wherein the step of forming the active bond pad and the first thermal bond pad is further characterized by the of active bond pad being located within a peripheral region of the packaged integrated circuit and the first thermal bond pad is located within a central region of the packaged integrated circuit.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Feb 3, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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SECURITY AGREEMENT Recorded Jul 7, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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