SEMICONDUCTOR DEVICE AND DMA TRANSFER METHOD
A semiconductor device includes a plurality of resources for performing DMA transfer and a DMA controller, wherein the plurality of resources each include a transfer setting register
1 . A semiconductor device comprising:
a plurality of resources for performing DMA transfer; and
a DMA controller,
wherein the plurality of resources each include a transfer setting register.
2 . The semiconductor device according to claim 1 ,
wherein the DMA controller includes a decoder for creating an address of the transfer setting register of a resource in response to the resource which requests a DMA transfer.
3 . The semiconductor device according to claim 2 ,
wherein the DMA controller includes a DMA transfer setting register for storing data read out from the transfer setting register of the resource which requests the DMA transfer and performing the DMA transfer.
4 . The semiconductor device according to claim 2 ,
wherein the DMA controller performs the DMA transfer using the transfer setting registers of the plurality of resources as DMA transfer setting registers.
5 . The semiconductor device according to claim 2 ,
wherein the decoder creates addresses corresponding to the plurality of resources.
6 . The semiconductor device according to claim 1 ,
wherein the DMA controller includes a DMA transfer setting register for storing data read out from the transfer setting register of the resource which requests the DMA transfer and performing the DMA transfer.
7 . The semiconductor device according to claim 1 ,
wherein the DMA controller performs the DMA transfer using the transfer setting registers of the plurality of resources as DMA transfer setting registers.
8 . The semiconductor device according to claim 1 ,
wherein the plurality of resources include at least one of a UART, a timer, an A/D converter, an external interrupt control, a serial 10 , and an image macro.
9 . A DMA controller comprising:
a decoder for receiving a DMA transfer request from a resource and creating an address of a transfer setting register included in the resource.
10 . The DMA controller according to claim 9 , further comprising:
a DMA transfer setting register for storing data read out from the transfer setting register of the resource.
11 . The DMA controller according to claim 9 , wherein the decoder includes a selector and an address creation unit.
12 . A DMA transfer control method in a semiconductor device comprising a plurality of resources for performing a DMA transfer and a DMA controller, the method comprising:
requesting a DMA transfer at one of the plurality of resources;
creating an address of a transfer setting register of the resource which requests the DMA transfer at the DMA controller; and
performing the DMA transfer based on the address created by the DMA controller at the resource which requested the DMA transfer.