Methods of forming inter-poly dielectric (IPD) layers in power semiconductor devices

1. A process for forming an inter-electrode dielectric layer inside a trench, comprising:

lining sidewalls and bottom of the trench with a first layer of dielectric material;

substantially filling the trench with a first layer of conductive material to form a first electrode;

recessing the first layer of dielectric material and the first layer of conductive material to a first depth inside the trench forming shallow troughs on the top surface of the first dielectric layer remaining on either side of the conductive material;

forming a layer of polysilicon material on a top surface of the dielectric material and conductive material inside the trench;

oxidizing the layer of polysilicon material thereby converting it into a silicon dioxide layer; and

forming a second electrode made of conductive material inside the trench atop the silicon dioxide and isolated from trench sidewalls by a second dielectric layer.

2. A process for forming an inter-electrode dielectric layer inside a trench, comprising:

lining sidewalls and bottom of the trench with a first layer of dielectric material;

substantially filling the trench with a first layer of conductive material to form a first electrode;

recessing the first layer of conductive material to a first depth inside the trench;

substantially filling a remaining portion of the trench with dielectric fill material;

recessing the first layer of dielectric material and the dielectric fill material to a second depth to form an inter-electrode dielectric layer; and

forming a second electrode made of conductive material inside the trench atop the inter-electrode dielectric layer and isolated from trench sidewalls by a second dielectric layer.

3. A process for forming an inter-electrode dielectric layer inside a trench, comprising:

lining sidewalls and bottom of the trench with a first layer of dielectric material;

substantially filling the trench with a first layer of conductive material to form a first electrode;

recessing the first layer of conductive material to a first depth inside the trench such that a top portion of the recessed conductive material is higher than a final target depth by a desired thickness;

enhancing an oxidation rate of the top portion of the recessed first layer of conductive material;

removing the first layer of dielectric material from remaining trench sidewalls;

performing an oxidation step whereby the altered top portion of the first layer of conductive material oxidizes at a faster rate than the trench sidewalls, forming an inter-electrode dielectric layer that is thicker than sidewall dielectric lining; and

forming a second electrode made of conductive material inside the trench atop the inter-electrode dielectric layer and isolated from trench sidewalls by the sidewall dielectric lining.

4. The method of claim 3 wherein the step of enhancing an oxidation rate of the top portion of the recessed first layer of conductive material comprises one of either chemically or physically altering the top portion.

5. The method of claim 3 wherein the step of enhancing an oxidation rate of the top portion of the recessed first layer of conductive material comprises implanting impurities substantially perpendicularly to a top surface of the first layer of conductive material.

6. The method of claim 5 wherein the impurities are one of argon or fluorine.

7. A method for forming an inter-electrode dielectric layer inside a trench, comprising:

lining sidewalls and bottom of the trench with a first layer of dielectric material;

substantially filling the trench with a first layer of conductive material to form a first electrode;

recessing the first layer of dielectric material and the first layer of conductive material to a first depth inside the trench;

preferentially forming a second layer of dielectric whereby a relatively thicker inter-electrode dielectric layer is formed on horizontal surface structure inside the trench and a relatively thin dielectric layer is formed along sidewalls of the trench;

removing the relatively thin dielectric layer along sidewalls of the trench; and

forming a second electrode made of conductive material inside the trench atop the inter-electrode dielectric layer and isolated from trench sidewalls by a sidewall dielectric lining.

8. The method of claim 7 wherein the step of preferentially forming a second dielectric layer comprises a directional deposition process.

9. The method of claim 8 wherein the directional deposition process comprises plasma-enhanced chemical vapor deposition.

10. A method forming an inter-electrode dielectric layer inside a trench, comprising:

lining sidewalls and bottom of the trench with a first layer of dielectric material;

substantially filling the trench with a first layer of conductive material to form a first electrode;

recessing the first layer of dielectric material and the first layer of conductive material to a first depth inside the trench;

forming a thin layer of screen oxide along vertical and horizontal surfaces inside the trench;

forming a layer of silicon nitride covering the thin layer of screen oxide;

removing the silicon nitride from the bottom of the trench to expose the horizontal layer of screen oxide but leaving the vertical screen oxide covered by the silicon nitride;

exposing the trench to an oxidizing ambient to form a relatively thick inter-electrode dielectric layer on the horizontal bottom surface of the trench;

removing the silicon nitride from trench sidewalls; and

forming a second electrode made of conductive material inside the trench atop the inter-electrode dielectric layer and isolated from trench sidewalls by a sidewall dielectric lining.

11. A method for forming an inter-electrode dielectric layer inside a trench formed in a semiconductor substrate, comprising:

forming a first electrode made of conductive material in a lower portion of the trench and isolated from trench sidewalls and bottom by a first dielectric lining;

forming a thick layer of dielectric material filling the trench and extending above the semiconductor substrate;

substantially planarizing the thick layer of dielectric layer back to a top surface of the semiconductor substrate; and

performing an isotropic wet etch process that recesses the remaining portion of the thick layer of dielectric material inside the trench to a target depth.

12. The method of claim 11 wherein the step of substantially planarizing comprises performing an anisotropic plasma etch process.

13. The method of claim 11 wherein the step of substantially planarizing comprises performing a chemical mechanical planarization process.

14. A method for forming a semiconductor device, comprising:

forming a drift region of a first conductivity type;

forming a well region extending above the drift region and having a second conductivity type opposite the first conductivity type;

forming an active trench extending through the well region and into the drift region,

lining sidewalls and bottom of the active trench with a first layer of dielectric material;

substantially filling the active trench with a first layer of conductive material to form a first electrode;

recessing the first layer of dielectric material and the first layer of conductive material to a first depth inside the trench;

forming a layer of polysilicon material on a top surface of the dielectric material and conductive material inside the trench;

oxidizing the layer of polysilicon material thereby converting it into a silicon dioxide layer;

forming a second electrode made of conductive material inside the trench atop the silicon dioxide and isolated from trench sidewalls by a second dielectric layer;

forming a plurality of source regions having the first conductivity type in the well region adjacent the active trench;

forming a charge control trench extending deeper into the drift region than the active trench;

lining the charge control trench with a layer of dielectric material; and

depositing in the lined charge control trench a conductive material to allow for vertical charge control in the drift region.

15. The method of claim 14 further comprising forming independent electrical contacts for the first electrode and the second electrode to independently electrically bias each electrode.

16. The method of claim 14 wherein the lined charge control trench is substantially filled with the conductive material.

17. The method of claim 14 further comprising disposing inside the charge control trench a plurality of conductive layers stacked vertically and separated from each other and from the charge control trench sidewalls by a dielectric material.

18. The method of claim 17 further comprising forming independent electrical contacts for the plurality of conductive layers.

19. The method of claim 17 further comprising varying the thicknesses of the plurality of the conductive layers.