Omnibus logic element
View Patent ↗Disclosed is an LE that can provide a number of advantageous features. For example, the LE can provide efficient and flexible use of LUTs and input sharing. The LE may also provide for flexible use of one or more dedicated adders and include register functionality.
1. A device, comprising:
a fracturable logic element having x-input lines operable to carry out a single y-input logic function or carry out multiple z-input logic functions, where x>y>z and the multiple z-input logic functions are operable to share input lines, the fracturable logic element comprising:
a plurality of four-input lookup tables;
a plurality of three-input lookup tables;
a plurality of first level multiplexers controlled by a subset of the x input lines and configured to select an output from one of the plurality of three-input lookup tables.
2. The device of claim 1 , wherein x=8, y=6, and z=5 and two input lines are shared.
3. The device of claim 1 , wherein x=8, y=6, and z=4 and no input lines are shared.
4. The device of claim 1 , wherein the fracturable lookup includes two four-input lookup tables.
5. The device of claim 1 , wherein the fracturable lookup includes four three-input lookup tables.
6. The device of claim 1 , wherein the fracturable logic element eight input lines operable to carry out a single six input logic function.
7. The device of claim 1 , wherein two of the input lines are connected to all of the four-input lookup tables and all of the three-input lookup tables.
8. The device of claim 1 , wherein one of the input lines is connected to half of the four-input lookup tables, half of the three-input lookup tables, and a first multiplexer from the plurality of first level multiplexers.
9. The device of claim 8 , wherein the output of the first multiplexer is connected to one of the plurality of four-input lookup tables.
10. The device of claim 1 , further comprising a plurality of second level multiplexers.
11. The device of claim 10 , wherein the plurality of second level multiplexers have inputs connected to outputs of the plurality of three-input lookup tables.
12. The device of claim 11 , wherein the plurality of second level multiplexers are controlled by either outputs of the plurality of first level multiplexers or particular input lines.
13. A system, comprising:
memory;
a plurality of logic elements including a fracturable logic element, the fracturable logic element having x-input lines operable to carry out a single y-input logic function or carry out multiple z-input logic functions, where x>y>z and the multiple z-input logic functions are operable to share input lines, the fracturable logic element comprising:
a plurality of four-input lookup tables;
a plurality of three-input lookup tables;
first level selection means controlled by a subset of the x input lines and configured to select an output from one of the plurality of three-input lookup tables.
14. The device of claim 13 , wherein x=8, y=6, and z=5 and two input lines are shared.
15. The device of claim 13 , wherein x=8, y=6, and z=4 and no input lines are shared.
16. The device of claim 13 , wherein the fracturable lookup includes two four-input lookup tables.
17. The device of claim 13 , wherein the fracturable lookup includes four three-input lookup tables.
18. The device of claim 13 , wherein the fracturable logic element eight input lines operable to carry out a single six input logic function.
19. The device of claim 13 , wherein two of the input lines are connected to all of the four-input lookup tables and all of the three-input lookup tables.
20. The device of claim 13 , wherein one of the input lines is connected to half of the four-input lookup tables, half of the three-input lookup tables, and the first level selection means.