IP Library Granted Patent US 7,907,381
Granted Patent B2
US 7,907,381 · App. 12/046,642 · Granted Mar 15, 2011

Protection circuit for a subscriber line interface circuit

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Quick Facts
Patent No.
US 7,907,381
App. No.
12/046,642
Granted
Mar 15, 2011
Kind
B2
Abstract

The present invention provides a protection circuit coupled to a tip lead and a ring lead in a subscriber line interface circuit formed on a silicon substrate. The protection circuit includes first and second diodes formed on the silicon substrate and coupled to the tip lead and the ring lead, respectively. The first and second diodes are configured to provide a path from the tip lead or the ring lead to ground in response to a positive voltage at the tip lead or the ring lead. The protection circuit also includes a silicon-controlled rectifier formed on the silicon substrate and configured to provide, in response to a negative voltage at the tip lead or the ring lead, a path from the tip lead or the ring lead to ground via the silicon-controlled rectifier.

Claims (21)

1. A protection circuit coupled to a tip lead and a ring lead in a subscriber line interface circuit formed on a silicon substrate, the protection circuit comprising:

first and second diodes formed on the silicon substrate and coupled to the tip lead and the ring lead. respectively, the first and second diodes configured to provide a path from the tip lead or the ring lead to ground in response to a positive voltage at the tip lead or the ring lead:

a silicon-controlled rectifier formed on the silicon substrate and configured to provide a path from the tip lead to ground via the silicon-controlled rectifier in response to a negative voltage at the tip lead and a path from the ring lead to ground via the silicon-controlled rectifier in response to a negative voltage at the ring lead; and

third and fourth diodes formed on the silicon substrate and coupled in series with the first and second diodes and the tip lead and the ring lead, respectively, the third and fourth diodes configured to be coupled to a battery voltage so that the third and fourth diodes are reversed biased during steady-state operation of the subscriber line interface circuit.

2. The protection circuit of claim 1 , comprising a control circuit formed on the silicon substrate and configured to generate a control signal in response to the negative voltage exceeding the magnitude of the battery voltage.

3. The protection circuit of claim 2 , wherein the silicon-controlled rectifier provides a path from the tip lead or the ring lead to ground when the magnitude of the negative voltage exceeds the magnitude of the battery voltage.

4. The protection circuit of claim 3 , wherein the silicon-controlled rectifier provides a path from the tip lead or the ring lead to ground in response to receiving the control signal from the control circuit.

5. The protection circuit of claim 4 , wherein the silicon-controlled rectifier provides a path from the tip lead or the ring lead to ground in response to receiving a control signal at a voltage that has a magnitude that exceeds a magnitude of an internal reference voltage of the silicon-controlled rectifier.

6. A method of forming a protection circuit coupled to a tip lead and a ring lead in a subscriber line interface circuit, comprising:

forming the subscriber line interface circuit on a silicon substrate, wherein the subscriber line interface circuit is configured to be coupled to a silicon-controlled rectifier configured to provide a path from the tip lead to ground via the silicon-controlled rectifier in response to a negative voltage at the tip lead and a path from the ring lead to ground via the silicon-controlled rectifier in response to a negative voltage at the ring lead;

forming first and second diodes on the silicon substrate, the first and second diodes being coupled to the tip lead and the ring lead, respectively, the first and second diodes configured to provide a path from the tip lead or the ring lead to ground in response to a positive voltage at the tip lead or the ring lead; and

forming third and fourth diodes on the silicon substrate, the third and fourth diodes being coupled in series with the first and second diodes and the tip lead and the ring lead, respectively, the third and fourth diodes configured to be coupled to a battery voltage so that the third and fourth diodes are reversed biased during steady-state operation of the subscriber line interface circuit.

7. The method of claim 6 , comprising forming a control circuit on the silicon substrate, the control circuit configured to generate a control signal in response to the negative voltage exceeding the magnitude of the battery voltage, wherein the silicon-controlled rectifier provides a path from the tip lead or the ring lead to ground in response to receiving the control signal from the control circuit.

8. A protection circuit coupled to a plurality of subscriber line interface circuits formed on a silicon substrate, each subscriber line interface circuit including a tip lead and a ring lead, the protection circuit comprising:

a plurality of diodes formed on the silicon substrate and comprising a first diode coupled to each tip lead and a second diode coupled to each ring lead, the first and second diodes configured to provide a path from each tip lead or ring lead to ground in response to a positive voltage at the tip lead or the ring lead;

a silicon-controlled rectifier formed on the silicon substrate and configured to provide a path from each tip lead to ground via the silicon-controlled rectifier in response to a negative voltage applied to the tip lead and a path from each ring lead to ground via the silicon-controlled rectifier in response to a negative voltage applied to the ring lead: and

third and fourth diodes formed on the silicon substrate and coupled in series with each first and second diode and each tip lead and ring lead, respectively, the third and fourth diodes configured to be coupled to a battery voltage so that the third and fourth diodes are reversed biased during steady-state operation of the subscriber line interface circuit.

9. The protection circuit of claim 8 , comprising a plurality of control circuits formed on the silicon substrate and configured to generate control signals in response to the negative voltage exceeding the magnitude of the battery voltage.

10. The protection circuit of claim 9 , wherein the silicon-controlled rectifier provides a path from at least one tip lead or ring lead to ground when the magnitude of the negative voltage exceeds the magnitude of the battery voltage.

11. The protection circuit of claim 10 , wherein the silicon-controlled rectifier provides a path from at least one tip lead or ring lead to ground in response to receiving at least one control signal from at least one of the plurality of control circuits.

12. The protection circuit of claim 11 , wherein the silicon-controlled rectifier provides a path from the tip leads or the ring leads to ground in response to receiving a control signal at a voltage that has a magnitude that exceeds a magnitude of an internal reference voltage of the silicon-controlled rectifier.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.), INC.; MICROSEMI FREQUENCY AND TIME CORPORATION; MICROSEMI COMMUNICATIONS, INC.; MICROSEMI SOC CORP.; MICROSEMI CORP. - POWER PRODUCTS GROUP; MICROSEMI CORP. - RF INTEGRATED SOLUTIONS
Reel/Frame 046251/0391 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC. (F/K/A LEGERITY, INC., ZARLINK SEMICONDUCTOR (V.N.) INC., CENTELLAX, INC., AND ZARLINK SEMICONDUCTOR (U.S.) INC.); MICROSEMI FREQUENCY AND TIME CORPORATION (F/K/A SYMMETRICON, INC.); MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION); MICROSEMI SOC CORP. (F/K/A ACTEL CORPORATION); MICROSEMI CORP. - POWER PRODUCTS GROUP (F/K/A ADVANCED POWER TECHNOLOGY INC.); MICROSEMI CORP. - RF INTEGRATED SOLUTIONS (F/K/A AML COMMUNICATIONS, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037691/0697 →
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
NOTICE OF SUCCESSION OF AGENCY Recorded Apr 9, 2015
From: ROYAL BANK OF CANADA (AS SUCCESSOR TO MORGAN STANLEY & CO. LLC)
To: BANK OF AMERICA, N.A., AS SUCCESSOR AGENT
Reel/Frame 035657/0223 →
PATENT SECURITY AGREEMENT Recorded Nov 26, 2013
From: MICROSEMI SEMICONDUCTOR (U.S.) INC.
To: MORGAN STANLEY & CO. LLC
Reel/Frame 031729/0667 →
CHANGE OF NAME Recorded Nov 18, 2013
From: ZARLINK SEMICONDUCTOR (U.S.) INC.
To: MICROSEMI SEMICONDUCTOR (U.S.) INC.
Reel/Frame 031746/0214 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2008
From: SPEYER, CHRISTOPHER J.
To: ZARLINK SEMICONDUCTOR (US) INC.
Reel/Frame 020637/0570 →