Configurable IC with packet switch network
View Patent ↗Some embodiments of the invention provide configurable integrated circuit (IC) that includes several configurable circuits that are conceptually in tiles. The IC also includes a first data network for passing data between the configurable circuits. The IC further includes a second packet-switch network for receiving packets of data from the outside of the configurable IC and switchably routing each packet to at least one destination tile. In some embodiments, the second packet-switch network supplies data from the tiles that the configurable circuits output in response to data packets received from outside of the configurable IC. Also, in some embodiments a particular packet that is for a particular resource in a particular tile includes a first address that identifies the particular configurable tile from the plurality of configurable tiles, and then a second address that identifies the particular resource within the particular configurable tile.
1. A method of configuring an integrated circuit (IC) comprising (i) a plurality of configurable circuits for configurably performing operations and (ii) a configuration controller, the method comprising:
at the configuration controller, receiving configuration data from outside of the IC;
formulating at least one configuration data set based on the received configuration data; and
routing the at least one configuration data set to more than one configurable circuit.
2. The method of claim 1 further comprising supplying each of a plurality of formulated configuration data sets to more than one configurable circuit.
3. The method of claim 1 further comprising supplying the at least one configuration data set to each of a plurality of configurable circuits.
4. The method of claim 1 , wherein said at least one configuration data set is part of a packet that is addressed to at least one configurable circuit for which the configuration data set is intended.
5. A system comprising:
a) a memory for storing configuration data; and
b) an integrated circuit (IC) comprising:
i) a plurality of configurable circuits for configurably performing operations based on configuration data; and
ii) a configuration controller for (1) receiving the configuration data from the memory, (2) formulating configuration data sets, and (3) routing each of a plurality of configuration data sets to more than one configurable circuit.
6. The system of claim 5 , wherein the memory is a non-volatile memory.
7. The system of claim 6 , wherein the non-volatile memory is a flash memory.
8. The system of claim 5 , wherein the configurable circuits are organized in a particular arrangement, and the configuration controller is outside of said arrangement.
9. An apparatus comprising:
a) a memory for storing configuration data;
b) a plurality of configurable circuits organized in a particular arrangement;
c) a configuration controller for receiving configuration data and formulating configuration data packets; and
d) a packet-switch network traversing said arrangement for allowing more than one configurable circuit to receive each of a plurality of configuration data packets.
10. The apparatus of claim 9 , wherein the configuration controller is further for routing each of the plurality of configuration data packets to the more than one configurable circuit.
11. The apparatus of claim 9 , wherein the memory is outside of the arrangement.
12. The apparatus of claim 9 , wherein the memory is within the arrangement.
13. An integrated circuit (IC) comprising:
a) a plurality of sets of configurable circuits; and
b) a controller for (i) generating data packets and (ii) routing the data packets to the sets of configurable circuits, each of a plurality of data packets comprising an address of a particular set of configurable circuits at which a particular packet is directed and data for the particular set of configurable circuits.
14. The IC of claim 13 , wherein the data comprises configuration data.
15. The IC of claim 13 , wherein the data comprises a debug instruction.
16. The IC of claim 13 , wherein a particular set of configurable circuits comprises exactly one configurable circuit.
17. The IC of claim 13 , wherein a particular set of configurable circuits comprises more than one configurable circuit.
18. A method of accessing an integrated circuit (IC) comprising a plurality of groups of circuits, each group comprising at least one configurable circuit, the method comprising:
addressing a particular group of circuits; and
after addressing said particular group, addressing a particular circuit within the particular group.
19. The method of claim 18 , wherein addressing the particular group comprises specifying an address of the particular group and transmitting the address over a network of the IC.
20. The method of claim 19 , wherein the network is a configuration network.
21. The method of claim 19 , wherein the network is a debug network.
22. The method of claim 18 further comprising:
specifying and sending a first address for addressing the particular group of circuits; and
specifying and sending a second address for addressing the particular circuit within the particular group.
23. The method of claim 22 , wherein the first address addresses a plurality of groups including the particular group, wherein the second address addresses at least one circuit in each group addressed by the first address.
24. The method of claim 22 , wherein said sending is over a configuration network.
25. The method of claim 22 , wherein said sending is over a debug network.
26. The method of claim 22 , wherein said sending is to a plurality of groups of circuits including the particular group.