Computing device with entry authentication into trusted execution environment and method therefor
View Patent ↗A computing device ( 10 ) includes a trusted execution environment (TEE) manager ( 40 ) that manages a switchover from non-trusted software ( 116 ) to trusted software ( 118 ). The TEE manager ( 40 ) includes memory ( 90 ) configured to store password-bearing, immediate-operand instructions ( 54 ). At the point of switching between the non-trusted software ( 116 ) and the trusted software ( 118 ) the memory ( 90 ) may be accessed as instruction fetches, and its contents fetched into a CPU core ( 24 ) as instructions. Immediate-operand portions ( 60 ) of the immediate-operand instructions ( 54 ) provide passwords, which are written back into guess registers ( 80 ) within the TEE manager ( 40 ). When a predetermined relationship between the instructions ( 54 ) and guesses in guess registers ( 80 ) is identified, actual execution of the immediate-operand instructions ( 54 ) is verified, the TEE mode of operation is signaled, and security-sensitive hardware ( 44 ) is enabled for use by a privileged routine ( 42 ) portion of the trusted software ( 118 ).
1. A computing device which selectively operates in a non-privileged mode and a privileged mode, said computing device comprising:
a trusted data section configured to store an authentication routine which includes a plurality of immediate-operand instructions wherein each of said plurality of immediate operand instructions has an operand configured to convey a portion of a password;
a first control section configured to grant read access to said immediate-operand instruction in response to an instruction fetch addressed to said trusted data section;
a non-trusted data section configured to store a password guess; and
a second control section, configured as a physical circuit, coupled to said trusted and non-trusted data sections and configured to identify when a predetermined relationship exists between all of said plurality of immediate-operand instructions and said password guess and to signal said privileged mode of operation in response to identifying said predetermined relationship.
2. The computing device as claimed in claim 1 wherein write access is denied for said trusted data section while said computing device operates in said non-privileged mode.
3. The computing device as claimed in claim 1 wherein:
said trusted data section is configured so that said operands of said plurality of immediate-operand instructions are altered from time to time.
4. The computing device as claimed in claim 3 wherein said operands of said plurality of immediate-operand instructions are altered at least as often as said computing device operates in said privileged mode.
5. The computing device as claimed in claim 3 wherein:
said first control section includes a random number generator; and
said is operands of said plurality of immediate-operand instructions are altered in response to data generated by said random number generator.
6. The computing device as claimed in claim 1 wherein said plurality of immediate-operand instructions are prevented from being overwritten when said computing device operates in said non-privileged mode.
7. The computing device as claimed in claim 1 wherein said first control section is configured to deny read access to said plurality of immediate-operand instructions in response to a data fetch.
8. A computing device which selectively operates in a non-privileged mode and a privileged mode, said computing device comprising:
a processor;
a trusted execution environment manager having:
a first trusted data section configured to store an authentication routine which is executable by said processor and includes an immediate-operand instruction;
a first control section configured to grant read access to said immediate-operand instruction in response to an instruction fetch access addressed to said first trusted data section;
a non-trusted data section configured to store a password guess; and
a second control section coupled to said first trusted data section and to said non-trusted data section and configured to identify when a predetermined relationship exists between said immediate-operand instruction and said password guess and to signal said privileged mode of operation in response to identifying said predetermined relationship;
selectively enabled hardware coupled to said trusted execution environment manager, said selectively enabled hardware being enabled when said privileged mode is signaled and being disabled when said non-privileged mode is signaled; and
a second trusted data section configured to store a privileged routine which is executable by said processor, wherein said authentication routine exits to said privileged routine, said privileged routine is configured to access said selectively enabled hardware, and said privileged routine is configured to instruct said trusted execution environment manager to signal said non-privileged mode of operation prior to exiting.
9. A method of authenticating entry into a trusted environment of a computing device which has a processor and a hardware trusted execution environment manager and which selectively operates in a non-privileged mode and a privileged mode, said method comprising:
storing an authentication routine in a first trusted data section of said hardware trusted execution environment manager, said authentication routine being executable by said processor, said authentication routine including an immediate-operand instruction, and said authentication routine being configured to exit to a privileged routine;
granting, in a first control section of said hardware trusted execution environment manager, read access to said immediate-operand instruction in response to an instruction fetch access addressed by said processor to said first trusted data section;
storing a password guess in a non-trusted data section of said hardware trusted execution environment manager;
identifying, in a second control section of said hardware trusted execution environment manager, when a predetermined relationship exists between said immediate-operand instruction and said password guess;
signaling said privileged mode of operation in response to said identifying step;
enabling selectively enabled hardware coupled to said trusted execution environment manager when said privileged mode is signaled in response to said identifying step;
disabling said selectively enabled hardware when said non-privileged mode is signaled in response to said identifying step; and
storing said privileged routine in a second trusted data section, said privileged routine being executable by said processor, said privileged routine being configured to access said selectively enabled hardware, and said privileged routine being configured to instruct said trusted execution environment manager to signal said non-privileged mode of operation prior to exiting.
10. The method claimed in claim 9 wherein said computing device is formed using one or more semiconductor devices which have pins through which signals are routed into and out from said semiconductor devices and said method additionally comprises:
refraining from transferring said immediate-operand instruction through one or more of said pins of a semiconductor device of said one or more semiconductor devices.
11. The method claimed in claim 9 wherein said authentication routine includes an instruction which is executed by said processor to implement said step of storing said password guess in said non-trusted data section.
12. The method claimed in claim 11 wherein:
said authentication routine includes a plurality of immediate-operand instructions wherein each of said plurality of immediate operand instructions has an operand configured to convey a portion of a password;
said step of storing said password guess in said non-trusted data section is implemented by said processor executing all of said plurality of immediate operand instructions.
13. The method claimed in claim 9 wherein:
said immediate-operand instruction includes an operation code portion and an operand portion; and
said method additionally comprises altering said operand portion of said immediate-operand instruction from time to time.
14. The method claimed in claim 13 wherein said operand portion of said immediate-operand instruction is altered at least as often as said privileged routine is executed.
15. The method claimed in claim 13 wherein said operand portion of said immediate-operand instruction is altered in response to data provided by a random number generator.
16. The method claimed in claim 9 wherein:
said immediate-operand instruction includes an operation code portion and an operand portion; and
said privileged routine is configured to alter said operand portion of said immediate-operand instruction.
17. The method claimed in claim 9 wherein: said processor is prevented from overwriting said immediate-operand instruction when said selectively enabled hardware is disabled.