IP Library Patent Application 12068712
Patent Application
App. No. 12/068,712

Semiconductor device including copper wiring and via wiring having length longer than width thereof and method of manufacturing the same

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Quick Facts
Patent No.
US None
App. No.
12/068,712
Abstract

A semiconductor device has an interconnect and a via material. The via material is provided under the interconnect and is in contact with an end portion of the interconnect. The interconnect and the via are made of copper as one piece. The via material has a top surface coupled to a bottom surface of the interconnect. The top surface has a first portion parallel with a longitudinal direction of the interconnect and a second portion parallel with a direction perpendicular to the longitudinal direction, and the first portion is larger than the second portion.

Claims (33)

1 . A semiconductor device, comprising:

an interconnect; and

a via material which is provided under an end of the interconnect and includes a surface in contact with a surface of the interconnect;

wherein said surface of said via material comprises a first portion along a longitudinal direction of said interconnect and a second portion along a direction perpendicular to said longitudinal direction, and a maximum length of said first portion is larger than a maximum length of said second portion.

2 . The semiconductor device according to claim 1 , wherein the surface of the via material includes a rectangle shape having a long side parallel to the longitudinal direction of the interconnect.

3 . The semiconductor device according to claim 1 , wherein the maximum length of said second portion is substantially equal to a width of the interconnect.

4 . The semiconductor device according to claim 1 , wherein the maximum length of said first portion is not less than twice the maximum length of said second portion.

5 . The semiconductor device according to claim 1 , wherein the surface of the via material includes an oval shape having a long side parallel to the longitudinal direction of the interconnect.

6 . The semiconductor device according to claim 1 , wherein the interconnect comprises a first interconnect, and the semiconductor device further comprises a second interconnect which is provided under the via material to be connected to said first interconnect via the via material.

7 . The semiconductor device according to claim 1 , wherein the interconnect and the via material being integrally formed copper.

8 . The semiconductor device according to claim 6 , wherein the longitudinal direction of the second interconnect is perpendicular to the longitudinal direction of the first interconnect.

9 . The semiconductor device according to claim 6 , wherein the longitudinal direction of the second interconnect is parallel to the longitudinal direction of the first interconnect.

10 . A method of manufacturing a semiconductor device, comprising:

forming, by a dual damascene process, an interconnect and a via material, said via material being provided under the interconnect and being in contact with an end of the interconnect,

wherein said via material is formed to comprise a first portion along a longitudinal direction of said interconnect and a second portion along a direction perpendicular to said longitudinal direction, and a maximum length of said first portion is larger than a maximum length of said second portion.

11 . The method of manufacturing a semiconductor device according to claim 10 , wherein the forming of the interconnect and the via material comprises:

forming a hole for the via material; and

forming a trench for the interconnect.

12 . A semiconductor device, comprising:

a first wiring running in a first direction and including a copper;

a second wiring formed under said first wiring; and

a via wiring including a copper, arranged at an end portion of said first wiring, and formed between said first and second wirings, to connect said first and second wirings together therethrough, said via wiring having a top surface connected to a bottom surface of said first wiring, said top surface of via wiring having a shape defined by a first portion in parallel with said first direction and a second portion in parallel with a second direction perpendicular to said first direction, and a maximum length of said first portion being larger than a maximum length of said second portion.

13 . The semiconductor device as claimed in claim 12 , wherein said shape comprises a rectangular shape.

14 . The semiconductor device as claimed in claim 12 , wherein said shape comprises an oval shape.

15 . The semiconductor device as claimed in claim 12 , wherein an edge of said end portion of said first wiring is aligned with an edge of said via wiring.

16 . The semiconductor device as claimed in claim 15 , wherein a length of said first portion is more than twice as long as a length of said second portion.

17 . The semiconductor device as claimed in claim 12 , further comprising a barrier metal film formed on superficies of said first wiring and said via wiring, said barrier metal film being absent between said top surface of said first wiring and said bottom surface of said via wiring.

18 . The semiconductor device as claimed in claim 12 , wherein said second wiring includes copper and runs in said second direction and includes an end portion connected to said via wiring.

19 . The semiconductor device as claimed in claim 12 , wherein said second wiring includes copper and runs in said first direction and includes an end portion connected to said via wiring.

20 . The semiconductor device as claimed in claim 12 , wherein said second wiring includes copper and runs in said second direction and includes an intermediate portion connected to said via wiring.

21 . The semiconductor device as claimed in claim 12 , wherein said second wiring includes a top surface defined by a length and width, said length of said second wiring is longer than said width of said second wiring, and said first length of said via wiring is larger than said width of said second wiring.

22 . The semiconductor device as claimed in claim 21 , wherein said surface of said first wiring has a length and a width, said length of said first wiring is longer than said width of said first wiring, and said first length of said via wiring is larger than said width of said first wiring.

23 . The semiconductor device according to claim 22 , wherein said maximum length of said second portion of said via wiring is substantially equal to said width of the first wiring.

Assignments (2)
CHANGE OF NAME Recorded Nov 2, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025235/0497 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2008
From: MATSUBARA, YOSHIHISA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 020545/0722 →