Stacked semiconductor chips having double adhesive insulating layer interposed therebetween
View Patent ↗In a semiconductor chip, a first semiconductor chip 21 is provided on a chip-mounting component 11 , and bonding wires 36 connected to electrode pads 21 E of the first semiconductor chip 21 are fixed by being covered with a first insulating adhesive 31 . A second semiconductor chip 22 is mounted by being stacked on the first semiconductor chip 21 , with the first insulating adhesive 31 therebetween. This structure can prevent problems such as breaking and short-circuits of bonding wires of the chip disposed directly on a substrate when another chip is mounted by being stacked.
1. A semiconductor device comprising:
a chip-mounting component;
a first semiconductor chip provided on the chip-mounting component;
bonding wires connected to electrode pads of the first semiconductor chip;
a first insulating adhesive that selectively covers connecting portions where the electrode pads are connected to the bonding wires;
a second insulating adhesive provided on the first insulating adhesive and on a top surface of the first semiconductor chip that is not covered with the first insulating adhesive; and
a second semiconductor chip provided over the first semiconductor chip and the first insulating adhesive, wherein:
the second insulating adhesive is filled between the first semiconductor chip and the second semiconductor chip, and between the first insulating adhesive and the second semiconductor chip, and
the second semiconductor chip and the first insulating adhesive are isolated by the second insulating adhesive.
2. The semiconductor device according to claim 1 , wherein the first semiconductor chip, the second semiconductor chip, the bonding wires, and the first insulating adhesive are sealed with a resin on the chip-mounting component; and
the resin is provided in an area between the first semiconductor chip and the second semiconductor chip, the area not covered with the first insulating adhesive.
3. The semiconductor device according to claim 1 , wherein the first insulating adhesive individually covers a plurality of connecting portions where the electrode pads are connected to the bonding wires.
4. The semiconductor device according to claim 1 , wherein the first insulating adhesive integrally covers a plurality of connecting portions where the electrode pads are connected to the bonding wires.
5. The semiconductor device according to claim 1 , wherein the entirety of the bonding wires are covered with the first insulating adhesive.
6. The semiconductor device according to claim 1 , wherein the chip-mounting component is a die stage of a lead frame, and another end of each of the bonding wires is connected to an inner lead of the lead frame.
7. The semiconductor device according to claim 1 , wherein the bonding wires are connected to the electrode pads via bumps.
8. The semiconductor device according to claim 1 , further comprising:
a second insulating adhesive provided on the top surface of the first semiconductor chip that is not covered with the first insulating adhesive,
wherein the second semiconductor chip is provided on the first semiconductor chip, with the first insulating adhesive and the second insulating adhesive therebetween.
9. The semiconductor device according to claim 8 , wherein the second insulating adhesive is locally provided on the top surface of the first semiconductor chip in the form of islands.
10. The semiconductor device according to claim 8 , wherein the second insulating adhesive comprises a filler composed of particles made of an insulating material.
11. The semiconductor device according to claim 10 , wherein the maximum diameter of the filler is larger than the diameter of the bonding wires.
12. The semiconductor device according to claim 11 , wherein the maximum diameter of the filler is larger than the diameter of the bonding wires and larger than the thickness of the first insulating adhesive layer.