IP Library Granted Patent US 7,880,177
Granted Patent B2
US 7,880,177 · App. 12/090,181 · Granted Feb 1, 2011

Semiconductor light-emitting device, illuminator and method of manufacturing semiconductor light-emitting device

Assignee: Sanyo Electric Co., Ltd.
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Quick Facts
Patent No.
US 7,880,177
App. No.
12/090,181
Granted
Feb 1, 2011
Kind
B2
Abstract

A semiconductor light-emitting device having high reliability is obtained while suppressing separation between a support substrate and a semiconductor element layer. This semiconductor light-emitting device includes a support substrate ( 1 ), a first bonding layer ( 2 a ) formed on the support substrate ( 1 ), a second bonding layer ( 2 b ) formed on the first bonding layer ( 2 a ), a third bonding layer ( 2 c ) formed on the second bonding layer ( 2 b ), and a semiconductor element layer ( 3 ) formed on the third bonding layer ( 2 c ). The melting point of the second bonding layer ( 2 b ) is lower than the melting points of the first bonding layer ( 2 a ) and the third bonding layer ( 2 c ).

Claims (57)

1. A semiconductor light-emitting device comprising:

a support substrate ( 1 );

a first eutectic alloy layer ( 2 a ) formed on said support substrate;

a second eutectic alloy layer ( 2 b ) formed on said first eutectic alloy layer;

a third eutectic alloy layer ( 2 c ) formed on said second eutectic alloy layer; and

a semiconductor element layer ( 3 ) including an emission layer ( 3 d ) formed on said third eutectic alloy layer, wherein

the melting point of said second eutectic alloy layer is lower than the melting points of said first eutectic alloy layer and said third eutectic alloy layer, and

said third eutectic alloy layer is formed on the side surface of said semiconductor element layer through an insulating layer ( 4 ).

2. The semiconductor light-emitting device according to claim 1 , wherein

the thermal expansion coefficient of said second eutectic alloy layer is larger than the thermal expansion coefficients of said first eutectic alloy layer and said third eutectic alloy layer.

3. The semiconductor light-emitting device according to claim 1 , wherein

said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer contain at least any of an Au—Sn alloy, an Au—Ge alloy and an Au—Si alloy respectively.

4. The semiconductor light-emitting device according to claim 3 , wherein

said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer consist of the Au—Sn alloy, and

the content of Sn in said second eutectic alloy layer is larger than the contents of Sn in said first eutectic alloy layer and said third eutectic alloy layer.

5. The semiconductor light-emitting device according to claim 3 , wherein said first eutectic alloy layer and said third eutectic alloy layer consist of the Au—Ge alloy, and said second eutectic alloy layer consists of the Au—Sn alloy.

6. An illuminator comprising a semiconductor light-emitting device including:

a support substrate ( 1 );

a first eutectic alloy layer ( 2 a ) formed on said support substrate;

a second eutectic alloy layer ( 2 b ) formed on said first eutectic alloy layer;

a third eutectic alloy layer ( 2 c ) formed on said second eutectic alloy layer; and

a semiconductor element layer ( 3 ) including an emission layer ( 3 d ) formed on said third eutectic alloy layer, wherein

the melting point of said second eutectic alloy layer is lower than the melting points of said first eutectic alloy layer and said third eutectic alloy layer, and

said third eutectic alloy layer is formed on the side surface of said semiconductor element layer through an insulating layer ( 4 ).

7. The illuminator according to claim 6 , wherein

the thermal expansion coefficient of said second eutectic alloy layer is larger than the thermal expansion coefficients of said first eutectic alloy layer and said third eutectic alloy layer.

8. The illuminator according to claim 6 , wherein

said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer contain at least any of an Au—Sn alloy, an Au—Ge alloy and an Au—Si alloy respectively.

9. A method of manufacturing a semiconductor light-emitting device, comprising steps of:

forming a semiconductor element layer ( 3 ) including an emission layer ( 3 d );

arranging, between a support substrate ( 1 ) and said semiconductor element layer, a first eutectic alloy layer ( 2 a ), a second eutectic alloy layer ( 2 b ) and a third eutectic alloy layer ( 2 c ) in this order from the side of said support substrate; and

bonding said semiconductor element layer and said support substrate to each other through said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer by heating the same, wherein

the melting point of said second eutectic alloy layer is lower than the melting points of said first eutectic alloy layer and said third eutectic alloy layer, and

a heating temperature in the step of bonding said semiconductor element layer and said support substrate to each other is at least the melting point of said second eutectic alloy layer and less than the melting points of said first eutectic alloy layer and said third eutectic alloy layer, and

the step of arranging said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer includes a step of forming said third eutectic alloy layer on the side surface of said semiconductor element layer through an insulating layer.

10. The method of manufacturing a semiconductor light-emitting device according to claim 9 , wherein

the step of arranging said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer includes steps of:

forming said third eutectic alloy layer, said second eutectic alloy layer and said first eutectic alloy layer in this order on said semiconductor element layer, and

arranging said support substrate on said first eutectic alloy layer.

11. The method of manufacturing a semiconductor light-emitting device according to claim 9 , wherein

the step of arranging said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer includes steps of:

forming said third eutectic alloy layer, said second eutectic alloy layer and a part of said first eutectic alloy layer in this order on said semiconductor element layer,

forming another part of said first eutectic alloy layer on said support substrate, and

arranging the part of said first eutectic alloy layer formed on said support substrate on the part of said first eutectic alloy layer formed on said semiconductor element layer.

12. The method of manufacturing a semiconductor light-emitting device according to claim 9 , wherein

the step of forming said semiconductor element layer includes a step of forming said semiconductor element layer on a growth substrate ( 8 ),

the method further comprising a step of removing said growth substrate from said semiconductor element layer.

13. The method of manufacturing a semiconductor light-emitting device according to claim 9 , wherein

the thermal expansion coefficient of said second eutectic alloy layer is larger than the thermal expansion coefficients of said first eutectic alloy layer and said third eutectic alloy layer.

14. The method of manufacturing a semiconductor light-emitting device according to claim 9 , wherein

said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer contain at least any of an Au—Sn alloy, an Au—Ge alloy and an Au—Si alloy respectively.

15. The method of manufacturing a semiconductor light-emitting device according to claim 14 , wherein

said first eutectic alloy layer, said second eutectic alloy layer and said third eutectic alloy layer consist of the Au—Sn alloy, and

the content of Sn in said second eutectic alloy layer is larger than the contents of Sn in said first eutectic alloy layer and said third eutectic alloy layer.

16. The method of manufacturing a semiconductor light-emitting device according to claim 14 , wherein

said first eutectic alloy layer and said third eutectic alloy layer consist of the Au—Ge alloy, and

said second eutectic alloy layer consists of the Au—Sn alloy.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2017
From: SANYO ELECTRIC CO., LTD.
To: EPISTAR CORPORATION
Reel/Frame 041652/0122 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2016
From: FUTURE LIGHT LIMITED LIABILITY COMPANY
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 040523/0797 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2012
From: SANYO ELECTRIC CO., LTD.
To: FUTURE LIGHT, LLC
Reel/Frame 027957/0258 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2008
From: TAKEUCHI, KUNIO; KUNOH, YASUMITSU
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 020799/0972 →
Priority Claims (2)
JP 2006-280409 · Oct 13, 2006 · national
JP 2007-266058 · Oct 12, 2007 · national
Continuity (1)
Related Publication 20090173952A1 · Jul 9, 2009