Driving multiple parallel LEDs with reduced power supply ripple
View Patent ↗An LED driver is disclosed that drives LEDs connected in parallel. Instead of applying current to all the parallel-connected LEDs at the same time, under control of a common PWM brightness control signal, the application of current to each parallel path is staggered by using staggered brightness control signals. The turning on of the LEDs in the different parallel paths will have the same duty cycle but will be out of phase. This reduces ripple in the power supply by reducing the magnitude of the instantaneous current sink. In one embodiment, a shift register contains a binary representation of the PWM duty cycle, and a clock shifts the bits along the shift register. The PWM brightness control signals for each parallel path of LEDs are tapped from different positions along the shift register so that the PWM brightness control signals are identical but staggered.
1. A light emitting diode (LED) driver for driving LEDs connected to different parallel paths, the driver comprising:
a voltage source for connection to first ends of LEDs in a plurality of parallel paths;
a plurality of current set circuits, one current set circuit per parallel path, each current set circuit controlling a peak current through one or more LEDs connected in each parallel path; and
a pulse-width modulated (PWM) brightness control signal generator connected to the plurality of current set circuits, the brightness control signal generator being configured to generate staggered PWM brightness control signals to the plurality of current set circuits,
each current set circuit being configured to draw the peak current through its associated one or more LEDs at a duty cycle substantially corresponding to a duty cycle of a PWM brightness control signal applied to it, such that the plurality of current set circuits conduct current through their associated one or more LEDs at the same duty cycle but out of phase with each other.
2. The driver of claim 1 wherein the voltage source is a step up voltage regulator.
3. The driver of claim 1 wherein each current set circuit is a current regulator.
4. The driver of claim 1 wherein each current set circuit is a current regulator comprising:
a current control transistor in series with one or more LEDs in an associated parallel path; and
a feedback circuit connected to detect a current through the parallel path and connected to the current control transistor to control a conductivity of the current control transistor to cause the current through the parallel path to match a reference level.
5. The driver of claim 4 wherein each current set circuit further comprises a PWM brightness control transistor connected between an output of the feedback circuit and a control terminal of the current control transistor, the PWM brightness control transistor being connected to the PWM brightness control signal generator for receiving a staggered PWM brightness control signal to couple the output of the feedback circuit to the control terminal of the current control transistor at a duty cycle of the staggered PWM brightness control signal.
6. The driver of claim 1 wherein each current set circuit comprises:
a current set resistor in series with one or more LEDs in an associated parallel path; and
a PWM brightness control transistor connected in series between the current set resistor and the one or more LEDs in an associated parallel path, the PWM brightness control transistor being connected to the PWM brightness control signal generator for receiving a staggered PWM brightness control signal.
7. The driver of claim 1 wherein the PWM brightness control signal generator comprises:
a shift register storing bits corresponding to a PWM duty cycle of a brightness control signal, the shift register having bit positions;
a clock connected to the shift register for shifting the bits along the shift register; and
taps off the shift register coupled to different bit positions of the shift register, each tap providing a different staggered PWM brightness control signal connected to an associated current set circuit.
8. The driver of claim 7 wherein the shift register has a connection that connects an end bit position to a first bit position so that bits in the shift register are recirculated in the shift register.
9. The driver of claim 7 wherein the bits corresponding to a PWM duty cycle of a brightness control signal are serially and continuously loaded into a first bit position of the shift register, then shifted by the clock.
10. The driver of claim 7 wherein the clock shifts the bits at a rate equal to N times a frequency of the PWM brightness control signal, where N equals the number of bits representing a single PWM duty cycle.
11. The driver of claim 1 wherein the plurality of parallel paths comprises at least three paths.
12. The driver of claim 1 further comprising the LEDs connected to the driver.
13. The driver of claim 1 wherein the driver is formed as an integrated circuit.
14. A method for driving light emitting diodes (LEDs) connected to different parallel paths, the method comprising:
supplying a voltage to first ends of LEDs in a plurality of parallel paths;
setting a peak current through one or more LEDs connected in each of the parallel paths, the peak current being set by a current set circuit for each parallel path;
generating staggered pulse width modulated (PWM) brightness control signals;
applying a different staggered PWM brightness control signals to each current set circuit; and
drawing the peak current through the one or more LEDs in each parallel path, set by its associated current set circuit, at a duty cycle corresponding to a duty cycle of an associated PWM brightness control signal, such that the parallel paths of LEDs conduct current at substantially the same duty cycle but out of phase with each other.
15. The method of claim 14 further comprising varying the duty cycle of the staggered PWM brightness control signals to change an average current through the parallel paths of LEDs to change a perceived brightness of the LEDs.
16. The method of claim 14 wherein setting a peak current through one or more LEDs connected in each of the parallel paths comprises setting the peak current by controlling conductivity of a current control transistor in series with each parallel path, and wherein applying a different staggered PWM brightness control signal to each current set circuit comprises:
coupling each staggered PWM brightness control signal to a control terminal of an associated pass transistor, each pass transistor being connected between a control terminal of a respective current control transistor and a regulating control voltage, such that the current control transistor is turned on and off corresponding to a duty cycle of the associated pass transistor.
17. The method of claim 14 wherein applying a different staggered PWM brightness control signal to each current set circuit comprises applying each staggered PWM brightness control signals to an associated transistor connected in series with the one or more LEDs in an associated parallel path, such that the transistor is turned on and off corresponding to the duty cycle of the staggered PWM brightness control signal applied to it.
18. The method of claim 14 wherein generating staggered PWM brightness control signals comprises:
storing bits corresponding to a PWM duty cycle of a brightness control signal in a shift register, the shift register having bit positions;
shifting the bits along the shift register under control of a clock; and
receiving bits tapped off the shift register at different bit positions of the shift register to generate a different staggered PWM brightness control signal from the bits at each of the different bit positions.
19. The method of claim 18 further comprising recirculating bits in the shift register by feeding a bit at an output bit position to an input bit position along the shift register.
20. The method of claim 18 further comprising serially and continuously loading bits corresponding to a PWM duty cycle of a brightness control signal into a first bit position the shift register, then shifting the bits by the clock.
21. The method of claim 18 wherein the clock shifts the bits at a rate equal to N times a frequency of the PWM brightness control signal, where N equals the number of bits representing single PWM duty cycle.
22. The method of claim 14 wherein the plurality of parallel paths comprises at least three paths.