IP Library Granted Patent US 7,632,730
Granted Patent B2
US 7,632,730 · App. 12/105,493 · Granted Dec 15, 2009

CMOS image sensor and method for manufacturing the same

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Quick Facts
Patent No.
US 7,632,730
App. No.
12/105,493
Granted
Dec 15, 2009
Kind
B2
Abstract

A CMOS image sensor and a manufacturing method are disclosed. The gates of the transistors are formed in the active region of the unit pixel, and a diffusion region for the photo diode is defined by an ion implantation of impurities to the semiconductor substrate. The patterns of the photoresist that are the masking layer against ion implantation are formed on the semiconductor substrate in such a manner that they have the boundary portion of the isolation layer so as not to make the boundary of the defined photo diode contact with the boundary of the isolation layer. Damages by an ion implantation of impurities at the boundary portion between the diffusion region for the photo diode and the isolation layer are prevented, which reduces dark current of the COMS image sensor.

Claims (10)

1. A method for manufacturing a CMOS image sensor, comprising:

forming an isolation layer and an active region for a unit pixel on a semiconductor substrate;

forming a transistor on said semiconductor substrate;

forming a masking layer against an ion implantation on the isolation layer and on a portion of the active region on a boundary between the isolation layer and the active region; and

forming an impurity diffusion region for a photo diode formed in a portion of the active region and separated from an isolation region by performing an ion implantation of impurities, wherein forming the impurity diffusion region for a photo diode comprises:

forming an n − type diffusion region in the active region; and

forming a P 0 type diffusion region on the n − type diffusion region, wherein a non-diffusion region, where impurities are not diffused, is formed between the isolation region and both the n − type diffusion region and the P 0 type diffusion region of the impurity diffusion region, the non-diffusion region being formed on at least two sides of the impurity diffusion region.

2. The method for manufacturing a CMOS image sensor according to claim 1 , wherein said masking layer against ion implantation is formed with a photoresist.

3. The method for manufacturing a CMOS image sensor according to claim 1 , wherein said semiconductor substrate is formed with a P ++ type silicon substrate having a P − type epitaxial layer.

4. The method for manufacturing a CMOS image sensor according to claim 1 , wherein the P 0 type diffusion region is formed to reduce dark current generated on a surface of said semiconductor substrate.

Assignments (4)
CHANGE OF NAME Recorded Nov 3, 2021
From: CONVERSANT INTELLECTUAL PROPERTY INC.
To: MOSAID TECHNOLOGIES INCORPORATED
Reel/Frame 058793/0748 →
RELEASE OF SECURITY INTEREST Recorded Nov 11, 2020
From: CPPIB CREDIT INVESTMENTS INC.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 054385/0435 →
AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2017
From: DONGBU HITEK CO. LTD.; DONGBU ELECTRONICS CO., LTD.
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 041330/0143 →