Patent Assignment
Reel/Frame 054385/0435
Release of Security Interest
Recorded: 2020-11-11
Pages: 76
Assignor
CPPIB CREDIT INVESTMENTS INC.
Executed: 2020-10-28
Assignee
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
515 LEGGET DRIVE, SUITE 704, OTTAWA, K2K 3G4, CANADA
Covered Properties
(114)
Esd Protection Clamp for Mixed Voltage I/O Stages Using Nmos Transistors
Patent:
5,780,897 →
Application:
08/555,463 →
Driver Circuit with Precharge and Active Hold
Patent:
5,856,752 →
Application:
08/710,230 →
System and Method for on-Chip Debug Support and Performance Monitoring in a Microprocessor
Patent:
5,867,644 →
Application:
08/711,491 →
Esd Protection System for an Integrated Circuit with Multiple Power Supply Networks
Patent:
5,740,000 →
Application:
08/724,595 →
Input Comparison Circuitry and Method for a Programmable State Machine
Patent:
5,881,217 →
Application:
08/758,606 →
Load and Store Instructions Which Perform Unpacking and Packing of Data Bits in Separate Vector and Inter Cache Storage
Patent:
6,173,366 →
Application:
08/759,044 →
Method of Forming Lightly Doped Drain Region and Heavily Doping a Gate Using a Single Implant Step
Patent:
5,937,302 →
Application:
08/781,092 →
Processor Performance Counter for Sampling the Execution Frequency of Individual Instructions
Patent:
6,112,317 →
Application:
08/815,982 →
Post-Spacer Ldd Implant for Shallow Ldd Transistor
Patent:
5,989,964 →
Application:
08/818,427 →
Thin Polysilicon Masking Technique for Improved Lithography Control
Patent:
5,885,879 →
Application:
08/822,941 →
Method of Making an Igfet Using Solid Phase Diffusion to Dope the Gate, Source and Drain
A Process of Manufacturing a Semiconductor Device Having a Nitrogen Bearing Isolation Region
Patent:
6,057,209 →
Application:
08/891,278 →
High Performance Mosfet Transistor Fabrication Technique
Patent:
5,970,347 →
Application:
08/896,400 →
Memory Controller Supporting Dram Circuits with Different Operating Speeds
Patent:
6,134,638 →
Application:
08/910,847 →
Method and System for Copper Interconnect Formation
Spacer Formation by Poly Stack Dopant Profile Design
Patent:
6,159,814 →
Application:
08/968,444 →
Transistor Fabrication Employing Implantation of Dopant into Junctions Without Subjecting Sidewall Surfaces of a Gate Conductor to Ion Bombardment
Patent:
6,069,046 →
Application:
08/979,282 →
Wide Database Architecture
Patent:
6,195,282 →
Application:
08/986,358 →
Shallow Trench Isolation Formation with No Polish Stop
Patent:
6,090,712 →
Application:
08/992,489 →
Cache Memory Exchange Optimized Memeory Organization for a Computer System
Patent:
6,125,429 →
Application:
09/041,513 →
Esd Protection Clamp for Mixed Voltage I/O Stages Using Nmos Transistors
Patent:
5,932,918 →
Application:
09/072,129 →
Esd Protection Clamp for Mixed Voltage I/O Stages Using Nmos Transistors
Patent:
6,097,071 →
Application:
09/072,130 →
Method and Apparatus for Supporting Heterogeneous Memory in Computer Systems
Patent:
6,260,127 →
Application:
09/114,426 →
Embedded Input Logic in a High Input Impedance Strobed Cmos Differential Sense Amplifier
Patent:
6,195,377 →
Application:
09/241,212 →
Method and Apparatus for Disabling a Processor in a Multiprocessor Computer
Patent:
6,496,881 →
Application:
09/266,506 →
Scalable System Control Unit for Distributed Shared Memory Multi-Processor Systems
Patent:
6,378,029 →
Application:
09/295,668 →
Backup Redundant Routing System Crossbar Switch Architecture for Multi-Processor System Interconnection Networks
Patent:
6,263,415 →
Application:
09/296,038 →
Scalable, Re-Configurable Crossbar Switch Architecture for Multi-Processor System Interconnection Networks
Multiple Frequency Switching Power Supply and Methods to Operate a Switching Power Supply
Patent:
6,127,816 →
Application:
09/368,401 →
System for Enabling a Receiver for Only a Fix Amount of Time and Disabling the Receiver Thereafter
Patent:
6,668,329 →
Application:
09/392,424 →
Contention Based Logic Gate Driving a Latch and Driven by Pulsed Clock
Patent:
6,265,897 →
Application:
09/466,493 →
System and method for enabling/disabling sram banks for memory access
Patent:
6,285,579 →
Application:
09/505,561 →
Read Around Speculative Load
Patent:
6,567,901 →
Application:
09/514,981 →
Method and Apparatus for Restoring Computer Resources
Patent:
6,633,978 →
Application:
09/540,386 →
Computer System Having Security Features for Authenticating Different Components
Patent:
6,625,729 →
Application:
09/540,811 →
Cache memory exchange optimized memory organization for a computer system
Patent:
6,353,876 →
Application:
09/643,431 →
Multiple frequency switching power supply and methods to operate a switching power supply
Patent:
6,294,904 →
Application:
09/656,669 →
Method and Apparatus for Scheduling and Using Memory Calibrations to Reduce Memory Errors in High Speed Memory Devices
Memory Controller with Temperature Sensors
Adaptive Calibration Technique for High Speed Memory Devices
Method, Computer System and Computer Program Product for Processing Extensible Markup Language Streams
Method and System for Directly Interconnecting Storage Devices to Controller Cards Within a Highly Available Storage System
Wide databus architecture
Patent:
6,366,491 →
Application:
09/761,297 →
Redundant Data Storage Systems and Methods of Operating a Redundant Data Storage System
System and Method Utilizing on-Chip Voltage Monitoring to Manage Power Consumption
Retiring Early-Completion Instructions to Improve Computer Operation Throughput
Method and System for Creating Secure Address Space Using Hardware Memory Router
Memory Table and Memory Manager for Use in Managing Memory
Method and Apparatus for Supporting Heterogeneous Memory in Computer Systems
Conditional Clock Gate That Reduces Data Dependent Loading on a Clock Network
Opportunistic Transmission of Portably Stored Digital Data
Method and Apparatus for Preserving the Integrity of a Management Subsystem Environment
Adapting Vlsi Clocking to Short Term Voltage Transients
A Method of Protecting User Process Data in a Secure Platform Inaccessible to the Operating System and Other Tasks on Top of the Secure Platform
Managing Latencies in Accessing Memory of Computer Systems
High Performance Multi-Controller Processing
Data Redundancy in a Hot Pluggable, Large Symmetric Multi-Processor System
System and Method for Multi-Destination Merge in a Storage Area Network
System Workload Characterization
Patent:
7,203,621 →
Application:
10/164,534 →
Driver Circuit Connected to a Switched Capacitor and Method of Operating Same
Method and Apparatus for Saving Power in Dynamic Circuits
Patent:
6,624,686 →
Application:
10/205,831 →
System and Method for Using a Using Vendor-Long Descriptor in Acpi for the Chipset Registers
A System and Method for Managing Power Consumption for a Plurality of Processors Based on a Supply Voltage to Each Processor, Temperature, Total Power Consumption and Individual Processor Power Consumption
Phase-Locked Loop Control Circuit
Register-Based De-Skew System and Method for a Source Synchronous Receiver
Method and Structure for External Control of Esd Protection in Electronic Circuits
Reset Scheme for I/O Pads in a Source Synchronous System
System and Method for Synchronizing Multiple Synchronizer Controllers
Programmable Clock Synchronizer
A Controller Arrangement for Synchronizer Data Transfer Between a Core Clock Domain and Bus Clock Domain Each Having Its Own Individual Synchronizing Controller
System and Method for Maintaining a Stable Synchronization State in a Programmable Clock Synchronizer
Phase Detector for a Programmable Clock Synchronizer
System and Method for Compensating for Skew Between a First Clock Signal and a Second Clock Signal
Persistent Volatile Memory Fault Tracking
Distributed Multiplexing Circuit with Built-in Repeater
Method and Device for Circuit Control
System and Method to Mitigate Voltage Fluctuations
Systems and Methods for Generating a Current
Output Buffer Slew Rate Control Using Clock Signal
System and Method for Signal Synchronization Based on Plural Clock Signals
Cmos Image Sensor Having Impurity Diffusion Region Separated from Isolation Region
Color Filter of Image Sensor, Image Sensor, and Method for Manufacturing the Image Sensor
Driver Circuit Connected to Pulse Shaping Circuitry
Phase Detection in a Sync Pulse Generator
Cmos Image Sensor
Apparatus and Method of Tuning a Digitally Controlled Input/Output Driver
Method and Apparatus for Providing the Proper Voltage to a Memory
System and Method for Controlling Power to Resources Based on Historical Utilization Data
Receiver and Method for Mitigating Temporary Logic Transitions
Multi-Controller Write Operations
Fault Detection System
Cmos Image Sensor and Method for Manufacturing the Same
Cmos Image Sensor and Method for Fabricating the Same
Cmos Image Sensor and Method for Fabricating the Same
Cmos Image Sensor and Method for Fabricating the Same
Cmos Image Sensor and Method for Manufacturing the Same
Cmos Image Sensor and Method of Fabricating the Same
Limiting Power State Changes to a Processor of a Computer Device
Cmos Image Sensor and Method for Manufacturing the Same
Image Sensor and Fabricating Method Thereof
Color Filter of Image Sensor, Image Sensor, and Method for Manufacturing the Image Sensor
Cmos Image Sensor and Manufacturing Method Thereof
Image Sensor and Method for Manufacturing the Same
Cmos Image Sensor and Method for Fabricating the Same
Cmos Image Sensor and Method for Manufacturing the Same
Image Sensor and Method for Manufacturing the Same
Image Sensor
Image Sensor and Method for Manufacturing the Same
Image Sensor and Method for Manufacturing the Same
Image Sensor Having Dielectric Layer Which Allows First Impurity Region of Photodiode to Be Isolated from Contact Plug and Second Impurity Region of the Photodiode to Contact the Contact Plug
Image Sensor and Methods of Driving and Fabricating the Same
Image Sensor and Method for Fabricating the Same
Image Sensor
Image Sensor
Related Assignments
(3)
Other recorded transfers of the patents in this record — the chain of ownership.
U.S. Intellectual Property Security Agreement (for Non-U.S. Grantors) - Short Form
Jan 10, 2012
From: 658276 N.B. LTD.; 658868 N.B. INC.; MOSAID TECHNOLOGIES INCORPORATED
To: ROYAL BANK OF CANADA
Reel/Frame 027512/0196 →
Change of Name
Mar 13, 2014
From: MOSAID TECHNOLOGIES INCORPORATED
To: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
Reel/Frame 032439/0638 →
Amended and Restated U.S. Patent Security Agreement (for Non-U.S. Grantors)
Aug 22, 2018
From: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046900/0136 →