System and method for signal synchronization based on plural clock signals
View Patent ↗A system includes a data path that provides a data signal at a first frequency corresponding to a first clock signal. A strobe generator generates a strobe signal at the first frequency. The strobe signal is synchronized with the data signal based on a second clock signal having a second frequency that is different from the first frequency.
1. A system comprising:
a data path that provides a data signal at a first frequency corresponding to a first clock signal;
a strobe generator that generates a strobe signal at the first frequency, the strobe signal being synchronized with the data signal based on a second clock signal having a second frequency that is different from the first frequency; and
a synchronization component that provides a synchronization signal to the data path and to the strobe generator based on the first and second clock signals.
2. The system of claim 1 , wherein the synchronization component propagates the first clock signal to define the synchronization signal provided to the data path and to the strobe generator, such that the synchronization signal has a desired phase shift relative to the first clock signal.
3. The system of claim 2 , wherein the synchronization component provides the synchronization signal based on one of a rising edge and a falling edge of the second clock signal.
4. The system of claim 3 , wherein the strobe generator provides the strobe signal based on the other of the rising edge and the falling edge of the second clock signal so tat the strobe signal is shifted a desired amount relative to the data signal.
5. The system of claim 1 , wherein the data path further comprises a data selector that selectively propagates input data to define the data signal based on the synchronization signal.
6. The system of claim 5 , wherein the data path further comprises data path logic that receives at least one input signal and provides the input data to the data selector.
7. The system of claim 5 , wherein the strobe generator further comprises a selector component that selectively provides logic values to define the strobe signal based on a phase shifted version of the synchronization signal.
8. The system of claim 7 , wherein the strobe generator implements a phase shift on the synchronization signal based on the second clock signal to provide the phase shifted version of the synchronization signal to the selector component of the strobe generator.
9. The system of claim 7 , wherein the data selector comprises a multiplexer for selectively providing the data signal using the synchronization signal as a selection input signal, and the selector component of the strobe generator comprises a multiplexer for selectively providing the strobe signal using the phase shifted version of the synchronization signal as a selection input signal.
10. The system of claim 1 , wherein the second frequency is an integer multiple of the first frequency, such that the strobe signal is delayed approximately a desired fraction of a cycle of a period relative to the data signal corresponding to a predetermined amount of phase shift between the strobe signal and the data signal.
11. The system of claim 10 , wherein the second frequency is approximately twice the first frequency, such that the strobe signal is delayed approximately a quarter of a cycle relative to the data signal.
12. A memory controller comprising the system of claim 1 , the memory controller employs the system to at least one of read and write data tat defines the data signal to associated memory.
13. An integrated circuit comprising the system of claim 1 .
14. A system comprising:
a synchronization component that provides a synchronization signal by propagating a first clock signal to define the synchronization signal based on a second clock signal, the second clock signal having a different frequency from a frequency of the first clock signal;
a data path that provides a data signal at the frequency of the first clock signal; and
a strobe generator that generates a strobe signal synchronized with the data signal based on the synchronization signal and the second clock signal.
15. The system of claim 14 , wherein the synchronization component provides the synchronization signal with a desired phase shift relative to the first clock signal.
16. The system of claim 14 , wherein the synchronization component provides the synchronization signal based on one of a rising edge and a falling edge of the second clock signal.
17. The system of claim 16 , wherein the strobe generator provides the strobe signal based on the other of the rising edge and the falling edge of to second clock signal so that the strobe signal is phase shifted a desired amount relative to the data signal.
18. The system of claim 17 , wherein the strobe signal is phase shifted approximately a quarter of a cycle relative to the data signal.
19. The system of claim 16 , wherein the data path further comprises a data selector that selectively propagates input data received from an associated data source as the data signal based on the synchronization signal.
20. The system of claim 19 , wherein the data path further comprises data path logic that receives at least one input signal corresponding to the input data and provides the input data to the data selector.
21. The system of claim 19 , wherein the strobe generator further comprises a selector component that selectively provides logic values as the strobe signal based on a phase shifted version of the synchronization signal.
22. The system of claim 21 , wherein the strobe generator implements a phase shift on the synchronization signal based on the second clock signal to provide the phase shifted version of the synchronization signal to the selector component of the strobe generator.
23. The system of claim 21 , wherein the data selector and the selector component of the strobe generator comprise substantially matched circuitry to provide a desired timing margin.
24. The system of claim 14 , wherein the frequency of the second clock signal is approximately twice the frequency of the first clock signal, such that the strobe signal is delayed approximately a quarter of a cycle relative to the data signal.
25. A memory controller comprising the system of claim 14 , the memory controller employs the system to at least one of read and write data as the data signal to associated memory.
26. A synchronous dining system comprising:
means for providing a data signal at a first frequency by propagating associated data based at least in part on a first clock signal having the first frequency;
means for providing a strobe signal at the first frequency synchronously with the data signal based on a second clock signal having a second frequency that is different from the first frequency; and
means for providing a synchronization signal based on the first and second clock signals, the means for providing the data signal and the means for providing the strobe signal providing respective signals based on the synchronization signal.
27. The system of claim 26 , further comprising means for selecting a data input to provide as the data signal based on the synchronization signal.
28. The system of claim 27 , further comprising means for selecting an output level to provide as the strobe signal based on a phase shifted version of the synchronization signal.
29. The system of claim 26 , further comprising means for providing the first and second clock signals.
30. The system of claim 26 , wherein the means for providing the synchronization signal further comprises means for phase shifting the first clock signal based on the second clock signal.
31. The system of claim 30 , further comprising means for phase shifting the synchronization signal based on the second clock signal, the strobe signal being at a selected level based on the phase shifted synchronization signal.
32. A method comprising:
providing a first signal based on input data, the first signal having a desired frequency corresponding to a first clock signal;
providing a second signal that is synchronized with the first signal by employing a second clock signal having a frequency that is a multiple of the desired frequency;
phase shifting the first clock signal based on the second clock signal to provide a selection signal, the first signal and the second signal being synchronized relative to each other based on the selection signal.
33. The method of claim 32 , further comprising phase shifting the selection signal based on the second clock signal, the second signal being provided based on the phase shifted selection signal.
34. The method of claim 32 , wherein the second signal is phase shifted relative to first signal based on the respective frequencies of the first and second clock signals.
35. The method of claim 34 , wherein the second signal is phase shifted approximately a quarter of a cycle relative to first signal.