Patent Assignment
Reel/Frame 034591/0627
Assignment of Assignor's Interest
Recorded: 2014-12-10
Received: 2014-12-10
Pages: 8
Assignor
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Executed: 2014-11-03
Assignee
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC.
390 MARCH ROAD, SUITE 100, OTTAWA, ONTARIO, CAX, K2K 0G7, CANADA
Covered Properties
(40)
Limiting Power State Changes to a Processor of a Computer Device
Application:
11/588,918 →
Fault Detection System
Application:
11/112,121 →
System and Method for Controlling Power to Resources Based on Historical Utilization Data
Application:
11/058,554 →
Method and Apparatus for Providing the Proper Voltage to a Memory
Application:
11/047,196 →
Apparatus and Method of Tuning a Digitally Controlled Input/Output Driver
Application:
11/038,732 →
Phase Detection in a Sync Pulse Generator
Application:
10/898,693 →
System and Method for Signal Synchronization Based on Plural Clock Signals
Application:
10/744,174 →
Output Buffer Slew Rate Control Using Clock Signal
Application:
10/732,687 →
Systems and Methods for Generating a Current
Application:
10/700,919 →
System and Method to Mitigate Voltage Fluctuations
Application:
10/653,760 →
Method and Device for Circuit Control
Application:
10/651,360 →
Distributed Multiplexing Circuit with Built-in Repeater
Application:
10/632,885 →
Persistent Volatile Memory Fault Tracking
Application:
10/630,994 →
Phase Detector for a Programmable Clock Synchronizer
Application:
10/630,298 →
A Controller Arrangement for Synchronizer Data Transfer Between a Core Clock Domain and Bus Clock Domain Each Having Its Own Individual Synchronizing Controller
Application:
10/630,182 →
System and Method for Synchronizing Multiple Synchronizer Controllers
Application:
10/629,989 →
System and Method for Maintaining a Stable Synchronization State in a Programmable Clock Synchronizer
Application:
10/630,297 →
Programmable Clock Synchronizer
Application:
10/630,159 →
System and Method for Compensating for Skew Between a First Clock Signal and a Second Clock Signal
Application:
10/630,317 →
Reset Scheme for I/O Pads in a Source Synchronous System
Application:
10/622,672 →
Method and Structure for External Control of Esd Protection in Electronic Circuits
Application:
10/448,763 →
Register-Based De-Skew System and Method for a Source Synchronous Receiver
Application:
10/376,390 →
Phase-Locked Loop Control Circuit
Application:
10/355,516 →
A System and Method for Managing Power Consumption for a Plurality of Processors Based on a Supply Voltage to Each Processor, Temperature, Total Power Consumption and Individual Processor Power Consumption
Application:
10/246,024 →
System and Method for Using a Using Vendor-Long Descriptor in Acpi for the Chipset Registers
Application:
10/212,691 →
Method and Apparatus for Saving Power in Dynamic Circuits
Application:
10/205,831 →
Driver Circuit Connected to a Switched Capacitor and Method of Operating Same
Application:
10/167,507 →
System Workload Characterization
Application:
10/164,534 →
Data Redundancy in a Hot Pluggable, Large Symmetric Multi-Processor System
Application:
10/095,125 →
Managing Latencies in Accessing Memory of Computer Systems
Application:
10/044,364 →
Adapting Vlsi Clocking to Short Term Voltage Transients
Application:
10/020,114 →
A Method of Protecting User Process Data in a Secure Platform Inaccessible to the Operating System and Other Tasks on Top of the Secure Platform
Application:
10/033,102 →
High Performance Multi-Controller Processing
Application:
10/053,991 →
Method and Apparatus for Preserving the Integrity of a Management Subsystem Environment
Application:
09/967,268 →
Opportunistic Transmission of Portably Stored Digital Data
Application:
09/921,467 →
Conditional Clock Gate That Reduces Data Dependent Loading on a Clock Network
Application:
09/919,294 →
Memory Table and Memory Manager for Use in Managing Memory
Application:
09/896,043 →
Method and System for Creating Secure Address Space Using Hardware Memory Router
Application:
09/864,527 →
Retiring Early-Completion Instructions to Improve Computer Operation Throughput
Application:
09/823,596 →
System and Method Utilizing on-Chip Voltage Monitoring to Manage Power Consumption
Application:
09/811,243 →