Managing latencies in accessing memory of computer systems
View Patent ↗The present invention, in various embodiments, provides techniques for managing latencies in accessing memory of computer systems. In one embodiment, upon accessing the memory system for a piece of data used by a first process, a latency manager determines the access time to acquire the piece of data in the memory system. The latency manager then compares the determined access time to a threshold. If the determined access time is greater than the threshold, the latency manager triggers an interrupt for the operating system to switch threads or processes so that execution of the first process is postponed and execution of a second process starts. Various embodiments include the latency manager is polled for the access time when the processor is stalled, the latency manager triggers a process switch when a particular memory subsystem is accessed, etc.
1. A method for managing a memory system having a plurality of subsystems, comprising the steps of:
upon accessing the memory system for a piece of data used by a first process
determining an access time to acquire the piece of data in the memory system;
comparing the determined access time to a threshold; and
taking actions based on results of the comparing step; including postponing execution of the first process and allowing execution of a second process;
wherein a value of the threshold is selected based on
cost of switching processes for execution.
2. The method of claim 1 wherein an intelligence performing the steps of postponing and allowing upon a notification from a latency manager regarding a relationship between the determined access time and the threshold; the latency manager determining the relationship independent from the intelligence.
3. The method of claim 2 wherein the intelligence is selected from a group consisting of a processor working with the memory system, an operating system working with the memory system, software running on the processor, and a memory manager managing the memory system.
4. The method of claim 1 wherein the actions further include monitoring the memory system or a system using the memory system.
5. The method of claim 1 wherein the determined access time is selected as the longest access time of a plurality of access times each of which corresponds to a memory access in a multiple memory access.
6. The method of claim 1 further comprising the step of accessing the piece of data in more than one subsystem at the same time; one subsystem having a shorter access time and one subsystem having a longer access time; the determined access time being that of the subsystem having the shorter access time, and, if the piece of data is missed in the subsystem having the shorter access time, then the determined access time being that of the subsystem having the longer access time.
7. The method of claim 1 further comprising the step of updating a previously determined access time to the determined access time if the determined access time is greater than the previously determined access time.
8. The method of claim 1 further comprising the step of notifying an intelligence working with the memory system; the intelligence being selected from a group consisting of a processor, an operating system, software running on the processor, and a memory manager managing the memory system; the intelligence performing the step of taking actions.
9. The method of claim 1 further comprising the step of changing the determined access time upon performing a task selected from a group consisting of changing the threshold, initiating an interrupt to an intelligence working with the memory system, and postponing executing the first process and allowing executing a second process.
10. The method of claim 1 wherein the determined access time is selected from a time to access at least one subsystem.
11. The method of claim 1 wherein a latency manager performing the step of determining; the latency manager being on a data path between a processor working with the memory system and the plurality of subsystems.
12. The method of claim 1 wherein the data is accessed from a subsystem having a shorter access time to a subsystem having a longer access time or in a non-sequential order.
13. A method for managing a memory system having a plurality of subsystems, comprising the steps of:
comparing an access time of a subsystem to a threshold; a value of the threshold being selected based on cost of switching processes for execution;
earmarking the subsystem based on results of the comparing step;
from the plurality of subsystems, determining an order for data to be accessed from a subsystem having a shorter access time to a subsystem having a longer access time; and
upon accessing the memory system for a piece of data used by a first process, if the data is missed in the earmarked subsystem, then postponing executing the first process and allowing executing a second process.
14. The method of claim 13 wherein an intelligence performing the steps of postponing and allowing upon notification from a latency manager regarding a relationship between the determined access time and the threshold; the intelligence being selected from a group consisting of a processor working with the memory system, an operating system working with the memory system, software running on the processor, a memory manager managing the memory system; the latency manger being part of managing the memory system.
15. An apparatus for managing a memory system having a plurality of subsystems, comprising:
means for, upon accessing the memory system for a piece of data used by a first process,
determining an access time to acquire the piece of data in the memory system;
comparing the determined access time to a threshold; and
taking actions based on results of the comparing step; including postponing execution of the first process and allowing execution of a second process; wherein a value of the threshold is selected based on
cost of switching processes for execution.
16. The apparatus of claim 15 wherein the determined access time is selected as the longest access time of a plurality of access times each of which corresponds to a memory access in a multiple memory access.
17. The apparatus of claim 15 further comprising means for accessing the piece of data in more than one subsystem at the same time; one subsystem having a shorter access time and one subsystem having a longer access time; the determined access time being that of the subsystem having the shorter access time, and, if the piece of data is missed in the subsystem having the shorter access time, then the determined access time being that of the subsystem having the longer access time.
18. An apparatus for managing a memory system having a plurality of subsystems, comprising:
means for comparing an access time of a subsystem to a threshold; a value of the threshold being selected based on cost of switching processes for execution;
means for earmarking a subsystem; and
means for determining, from the plurality of subsystems, an order for data to be accessed from a subsystem having a shorter access time to a subsystem having a longer access time;
wherein upon accessing the memory system for a piece of data used by a first process, if the data is missed in the earmarked subsystem, then postponing execution of the first process and allowing execution of a second process.
19. A computer-readable medium embodying instructions for a computer to perform a method for managing a memory system having a plurality of subsystems, the method comprising the steps of:
upon accessing the memory system for a piece of data used by a first process,
determining an access time to acquire the piece of data in the memory system;
comparing the determined access time to a threshold; and
taking actions based on results of the comparing step; including postponing execution of the first process and allowing execution of a second process;
wherein a value of the threshold is selected based on cost of switching processes for execution.
20. The computer-readable medium of claim 19 wherein the determined access time is selected as the longest access time of a plurality of access times each of which corresponds to a memory access in a multiple memory access.
21. The computer-readable medium of claim 19 wherein the method further comprising the step of accessing the piece of data in more than one subsystem at the same time; one subsystem having a shorter access time and one subsystem having a longer access time; the determined access time being that of the subsystem having the shorter access time, and, if the piece of data is missed in the subsystem having the shorter access time, then the determined access time being that of the subsystem having the longer access time.
22. A computer-readable medium embodying instructions for a computer to perform a method for managing a memory system having a plurality of subsystems, the method comprising the steps of:
comparing an access time of a subsystem to a threshold; a value of the threshold being selected based on cost of switching processes for execution;
earmarking the subsystem based on results of the comparing step;
from the plurality of subsystems, determining an order for data to be accessed from a subsystem having a shorter access time to a subsystem having a longer access time; and
upon accessing the memory system for a piece of data used by a first process, if the data is missed in the earmarked subsystem, then postponing executing the first process and allowing executing a second process.
23. The computer-readable medium of claim 19 wherein the actions further include monitoring the memory system or a system using the memory system.
24. The computer-readable medium of claim 19 wherein the method further comprising the step of updating a previously determined access time to the determined access time if the determined access time is greater than the previously determined access time.
25. The computer-medium of claim 1 wherein the determined access time is selected from a time to access at least one subsystem.