POWER DIVIDER INTEGRATED CIRCUIT
A power divider integrated circuit is provided. The power divider integrated circuit includes a substrate and a power divider circuit formed on one side of the substrate.
1 . A power divider integrated circuit comprising:
a substrate; and
a power divider circuit formed on one side of the substrate.
2 . A power divider integrated circuit in accordance with claim 1 further comprising a wire bond connecting the power divider circuit to a grounding structure.
3 . A power divider integrated circuit in accordance with claim 2 wherein the grounding structure is a lead frame.
4 . A power divider integrated circuit in accordance with claim 1 wherein the substrate forms a heterolithic microwave integrated circuit (HMIC) having no vias therethrough.
5 . A power divider integrated circuit in accordance with claim 1 wherein the substrate comprises only glass.
6 . A power divider integrated circuit in accordance with claim 1 wherein the power divider circuit comprises metal components on a top surface of the substrate.
7 . A power divider integrated circuit in accordance with claim 1 wherein the power divider circuit is configured to operate with a floating node.
8 . A power divider integrated circuit in accordance with claim 1 wherein the substrate defines an integrated circuit chip having no on-chip vias.
9 . A power divider integrated circuit in accordance with claim 1 wherein the power divider circuit comprises a four-way power divider.
10 . A power divider circuit topology comprising:
an input port;
a plurality of branches each corresponding to a different one of a plurality of output ports;
a capacitor within each of a different one of the plurality of circuit branches, each of the capacitors connected at a first end to a common node;
an inductor within each of the different one of the plurality of circuit branches, each of the inductors connected to a second end of each of the plurality of capacitors between the capacitor within each respective one of the plurality of circuit branches and the input port; and
a resistor within each of the different one of the plurality of circuit branches, each of the resistors connected between the common node and a corresponding output port.
11 . A power divider circuit topology in accordance with claim 10 wherein the plurality of capacitors, inductors and resistors comprise passive components.
12 . A power divider circuit topology in accordance with claim 10 further comprising a circuit connected to each of the plurality of circuit branches and configured to provide electrical grounding to each of the plurality of circuit branches.
13 . A power divider circuit topology in accordance with claim 12 further comprising at least one wire bond connecting the circuit to ground.
14 . A power divider circuit topology in accordance with claim 10 further comprising at least four circuit branches defining a four-way power divider.
15 . A power divider circuit topology in accordance with claim 10 wherein the common node defines a floating node.
16 . A power divider circuit topology in accordance with claim 10 wherein the plurality of capacitors, inductors and resistors are configured to operate in a frequency range of about 1.5 GHz to 2.5 GHz.
17 . A method of forming a power divider integrated circuit, the method comprising:
forming a substrate; and
depositing metal on one side of the substrate to define a plurality of components of a power divider circuit.
18 . A method in accordance with claim 17 further comprising wire bonding the power divider circuit to a grounding structure.
19 . A method in accordance with claim 17 wherein forming the substrate comprises using a heterolithic microwave integrated circuit (HMIC) process.
20 . A method in accordance with claim 17 wherein the substrate comprises only glass.