IP Library Granted Patent US 7,888,230
Granted Patent B2
US 7,888,230 · App. 12/121,331 · Granted Feb 15, 2011

Method of making an integrated circuit including structuring a material

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Quick Facts
Patent No.
US 7,888,230
App. No.
12/121,331
Granted
Feb 15, 2011
Kind
B2
Abstract

A method of making an integrated circuit including structuring a material. The method includes providing an arrangement of three-dimensional bodies. The material is arranged between the bodies and structured directed radiation. The projection pattern of the three-dimensional bodies is transferred into the material. The structured material connects at least two of the three-dimensional bodies.

Claims (34)

1. A method of making an integrated circuit including structuring a material, the method comprising:

providing an arrangement of three-dimensional bodies with the material arranged between the bodies; and

structuring the material by directed radiation,

whereby the projection pattern of the three-dimensional bodies is transferred into the material and the structured material connects at least two of the three-dimensional bodies.

2. The method of claim 1 , wherein the directed radiation comprises a radiation by one of the group of ions, electrons, or photons.

3. The method of claim 2 , wherein the radiation substantially has one direction.

4. The method of claim 2 , wherein the directed radiation comprises a radiation with ions selected from the group of BF 2 , B, P, As, Ge, N 2 , N, C, Si, F, In, Sb, He, Ne, Ar, Kr, Xe, or Rn.

5. The method of claim 1 , wherein the three-dimensional bodies comprise tubes.

6. The method of claim 5 , wherein the tubes comprise having a round or an elliptical cross-section.

7. The method of claim 5 , wherein the tubes comprise having an overhang.

8. The method of claim 1 , comprising selecting the material arranged between the structures from the group of silicon oxide, amorphous silicon, silicon nitride, or a photoresist.

9. The method of claim 1 , comprising modifying a removal rate of the material by the directed radiation and one of the exposed or non-exposed portions of the material is removed in a separate process.

10. The method of claim 9 , wherein the material arranged between the three-dimensional bodies comprises a material with a higher removal rate after radiation compared to the removal rate prior to radiation.

11. The method of claim 9 , wherein the material arranged between the three-dimensional bodies comprises a material with a lower removal rate after radiation compared to the removal rate prior to radiation.

12. The method of claim 9 , comprising removing in the separate process the material using a liquid.

13. The method of claim 12 , comprising selecting the liquid from the group of ammonia, fluoric acid, or a developer for photoresists.

14. The method of claim 9 , comprising removing in the separate process the material using a plasma.

15. The method of claim 1 , comprising eroding the material by the directed radiation.

16. A method of making an integrated circuit including structuring a material, the method comprising:

providing an arrangement of three-dimensional bodies with the material arranged between the bodies; and

structuring the material by directed radiation,

whereby the projection pattern of the three-dimensional bodies is transferred into the material and the structured material connects at least two of the three-dimensional bodies, and

wherein the arrangement of three-dimensional bodies forms part of stack capacitors and the material forms part of a support structure arranged between the stack capacitors.

17. A method of making an integrated circuit including structuring a material, the method comprising:

providing an arrangement of three-dimensional bodies with the material arranged between the bodies; and

structuring the material by directed radiation,

whereby the projection pattern of the three-dimensional bodies is transferred into the material and the structured material connects at least two of the three-dimensional bodies, and

wherein the arrangement of three-dimensional bodies forms stack capacitors and the material is used to structure a second material forming a support structure arranged between the stack capacitors.

18. An integrated circuit comprising:

a material, wherein the material is structured by the method of claim 1 .

19. An integrated circuit comprising:

at least two stack capacitors and a material, wherein the material is structured by the method of claim 1 .

20. A device comprising:

a DRAM component with a plurality of stack capacitor being connected by a material, wherein the material is structured by the method of claim 1 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 037254/0782 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2008
From: VON KLUGE, JOHANNES
To: QIMONDA AG
Reel/Frame 021468/0808 →