Integrated circuit comprising an amorphous region and method of manufacturing an integrated circuit
View Patent ↗An integrated circuit comprises a doped semiconductor portion including an amorphous portion and a contact structure comprising a conductive material. The contact structure is in contact with the amorphous portion. According to another embodiment, an integrated circuit comprises a doped semiconductor portion including a region having a non-stoichiometric composition and a contact structure comprising a conductive material. The contact structure is in contact with the region having a non-stoichiometric composition.
1. A method of forming an integrated circuit comprising
forming a doped semiconductor portion;
forming an amorphous portion in the doped semiconductor portion; and
forming a contact structure comprising a conductive material, so as to be in contact with the amorphous portion.
2. The method of claim 1 , wherein forming the contact structure comprises forming a metal silicide that is in contact with the amorphous portion.
3. The method of claim 1 , wherein forming the amorphous portion comprises performing an ion implantation process.
4. The method of claim 3 , wherein the ion implantation process comprises implanting ions of a gaseous species.
5. The method of claim 4 , wherein the ions are ions of a noble gas.
6. The method of claim 3 , wherein the ion implantation process comprises implanting ions selected from group IV of the periodic table.
7. The method of claim 1 , wherein the doped portion is formed in a semiconductor carrier.
8. The method of claim 7 , wherein forming an amorphous portion is performed in such a manner so that a monocrystalline portion remains at an interface between the doped portion and the semiconductor carrier.
9. An integrated circuit comprising a transistor, including:
a first and a second source/drain portion;
a channel region disposed between the first and the second source/drain portion, the channel region being disposed in a semiconductor substrate,
wherein at least one of the first and the second source/drain portions comprises an amorphous portion.
10. The integrated circuit of claim 9 , wherein the at least one of the first and the second source/drain portions further comprises a monocrystalline portion.
11. The integrated circuit of claim 10 , wherein the monocrystalline portion is disposed at an interface between the corresponding source/drain portion and a substrate portion.
12. The integrated circuit of claim 11 , wherein the interface comprises a first portion extending parallel to a main surface of the semiconductor substrate, the monocrystalline portion being disposed at the first portion of the interface.
13. The integrated circuit of claim 11 , wherein the interface comprises a second portion extending in a direction that intersects a main surface of the semiconductor substrate, the monocrystalline portion being disposed at the second portion of the interface.
14. The integrated circuit of claim 9 , further comprising a contact structure comprising a conductive material, the contact structure being in contact with a corresponding amorphous portion.
15. The integrated circuit of claim 14 , wherein the contact structure comprises a metal silicide that is in contact with the amorphous portion.
16. An integrated circuit comprising:
a doped semiconductor portion including an amorphous portion; and
a contact structure comprising a conductive material, the contact structure being in contact with the amorphous portion.
17. The integrated circuit of claim 16 , wherein the contact structure comprises a metal silicide that is in contact with the amorphous portion.
18. The integrated circuit of claim 16 , wherein the doped portion further comprises a monocrystalline portion.
19. The integrated circuit of claim 16 , wherein the doped semiconductor portion forms part of a semiconductor carrier.
20. The integrated circuit of claim 19 , wherein the monocrystalline portion is disposed at an interface between the doped portion and the semiconductor carrier.