IP Library Granted Patent US 8,668,833
Granted Patent B2
US 8,668,833 · App. 12/125,030 · Granted Mar 11, 2014

Method of forming a nanostructure

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Quick Facts
Patent No.
US 8,668,833
App. No.
12/125,030
Granted
Mar 11, 2014
Kind
B2
Abstract

A method of forming a discrete nanostructured element at one or more predetermined locations on a substrate is presented. The method includes forming a mask member over the substrate. A window is formed in the mask member at each of one or more locations at which it is required to form the nanostructured element thereby to expose a portion of a surface of the substrate. A portion of the substrate exposed by the window at the one or more locations is removed to form one or more recesses in the substrate. The method further includes forming a layer of a nanostructure medium over a surface of the recess and annealing the structure thereby to form the nanostructured element in each of the one or more recesses. The nanostructured element includes a portion of the nanostructure medium and has an external dimension along at least two substantially orthogonal directions of less than substantially 100 nm.

Claims (39)

1. A method of forming a discrete nanostructured element at one or more predetermined locations on a substrate comprising:

forming a mask member over said substrate;

forming a window in said mask member to expose a portion of a surface of said substrate at each of the one or more locations where said nanostructured element is to be formed;

removing a portion of said substrate exposed by said window at said one or more locations to form one or more recesses in said substrate;

forming a layer of a nanostructure medium over a surface of said recess and the mask member; and

annealing the layer of the nanostructure medium to form said nanostructured element in each of said one or more recesses, said nanostructured element comprising a portion of said nanostructure medium, said nanostructured element having an external dimension along at least two substantially orthogonal directions less than or substantially equal to 100 nm; and

removing the mask member after annealing the layer of the nanostructure medium.

2. A method as claimed in claim 1 wherein the step of forming said one or more recesses comprises the step of etching said structure.

3. A method as claimed in claim 1 wherein the step of forming a recess in said substrate comprises forming a recess having one or more walls defining a base shape corresponding to at least one selected from amongst a portion of a pyramidal structure, a portion of a square-base pyramidal structure, a portion of a cube, a portion of a cuboid, a concave rounded surface, a portion of a surface of a sphere, a portion of a surface of a cylinder and a groove of substantially v-shaped or u-shaped cross-section.

4. A method as claimed in claim 3 wherein at least one of said walls of said base shape is generally defined by a crystal plane of said substrate.

5. A method as claimed in claim 3 wherein said recess comprises a passageway having said base shape provided at a first end of said passageway, a second end of the passageway opposite said first end having an opening at said surface of said substrate.

6. A method as claimed in claim 5 wherein said passageway has bends, kinks, jogs and/or other locations at which a longitudinal axis of said passageway changes its orientation relative to other portions of the passageway.

7. A method as claimed in claim 1 wherein the nanostructured element comprises a nanoparticle.

8. A method as claimed in claim 1 wherein said recess comprises an elongate groove.

9. A method as claimed in claim 8 wherein said groove has a portion having a substantially v-shaped or u-shaped cross-section, said nanostructured elements being provided along an apex of said v-shaped or u-shaped portion of said groove.

10. A method as claimed in claim 8 wherein the nanostructured element comprises a nanowire.

11. A method as claimed in claim 1 wherein said mask member comprises silicon oxide.

12. A method as claimed in claim 1 wherein said nanostructure medium comprises a catalyst material.

13. A method as claimed in claim 1 wherein the nanostructured element is formed at an intersection of non-parallel walls of the recesses.

14. A method as claimed in claim 1 wherein said nanostructure medium comprises at least one selected from amongst Au, Ni, Al, Co and Ti.

15. A method as claimed in claim 1 further comprising the step of heating said nanostructure thereby to form a further nanostructure.

16. A method as claimed in claim 15 wherein the step of heating said nanostructure comprises the step of heating said nanostructure in the presence of a vapor.

17. A method as claimed in claim 16 wherein said vapour comprises a vapor bearing at least one selected from amongst a Group II element, a Group III element, a Group IV element, a Group V element and a Group VI element of the periodic table.

18. A method as claimed in claim 17 wherein said vapor comprises at least one selected from amongst a carbon-bearing vapor, a nitrogen-bearing vapor and a boron-bearing vapor.

19. A method as claimed in claim 1 wherein the step of forming the nanostructure medium comprises the step of forming a generally continuous layer of said medium.

20. A method as claimed in claim 1 wherein the step of forming the layer of the nanostructure medium comprises lining the surface of the mask member and walls of the recesses without filling the recesses.

21. A method of forming a device comprising:

providing a substrate prepared with a recess, wherein the substrate comprises a mask member over a top surface of the substrate, and the mask member comprises a window which exposes the recess, wherein the window is formed by mask and etch processes;

lining a top surface of the mask member and walls of the recess with a layer of a nanostructure medium without filling the recess;

annealing the layer of the nanostructure medium to form a nanostructure in the recess wherein the nanostructure comprising a portion of the nanostructure medium; and

removing the mask member after annealing the layer of the nanostructure medium.

22. The method of claim 21 wherein the nanostructure is formed at an intersection of non-parallel walls of the recesses.

23. A method of forming a nanowire at one or more predetermined locations on a substrate comprising the steps of:

forming a mask member over said substrate;

forming an elongate window in said mask member to expose a portion of a surface of said substrate at each of the one or more locations where said nanowire is to be formed;

etching a portion of said substrate exposed by said window at said one or more locations to form one or more grooves in said substrate;

forming a layer of a wire medium over a surface of said groove; and

annealing the layer of the wire medium thereby to form said nanowire in each of said one or more grooves along a bottom area of each of the grooves, said nanowire comprising a portion of said wire medium.

24. A method as claimed in claim 23 wherein said groove comprises a portion having a substantially v-shaped or u-shaped cross-section, said nanowire being formed along an apex of said portion of said groove.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2020
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 054600/0031 →
RELEASE OF SECURITY INTEREST Recorded Nov 18, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054475/0718 →
SECURITY AGREEMENT Recorded Nov 27, 2018
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 047660/0203 →
CHANGE OF NAME Recorded Jan 22, 2014
From: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 032101/0562 →
CHANGE OF NAME Recorded Jan 22, 2014
From: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
To: CHARTERED SEMICONDUCTOR MANUFACTURING PTE. LTD.
Reel/Frame 032101/0546 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2008
From: CHEW, HAN GUAN
To: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
Reel/Frame 020981/0518 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2008
From: ZHENG, FEI; CHOI, WEE KIONG; LIEW, TZE HAW
To: NATIONAL UNIVERSITY OF SINGAPORE
Reel/Frame 020981/0524 →