Memory sharing of time and frequency de-interleaver for ISDB-T receivers
View Patent ↗Time and frequency de-interleaving of interleaved data in an Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver includes exactly one random access memory (RAM) buffer in the ISDB-T receiver that performs both time and frequency de-interleaving of the interleaved data and a buffer address calculation module for generating buffer address in the buffer. The system performs memory sharing of the time and frequency de-interleaver for ISDB-T receivers and reduces the memory size required for performing de-interleaving in an ISDB-T receiver and combines the frequency and time de-interleaver buffers into one RAM thereby reducing the memory size.
1. A system for performing time and frequency de-interleaving of interleaved data in an Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver, said system comprising:
exactly one random access memory (RAM) buffer in said ISDB-T receiver that performs both time and frequency de-interleaving of said interleaved data; and
a buffer address calculation module that generates a buffer address in said buffer and increases a size of a time de-interleaver buffer by two locations.
2. The system of claim 1 , wherein said RAM buffer comprises a dynamic random access memory (DRAM).
3. The system of claim 1 , wherein said RAM buffer comprises a static random access memory (SRAM).
4. The system of claim 1 , wherein said RAM buffer writes incoming data carriers out of order.
5. The system of claim 1 , wherein said RAM buffer is read in order.
6. The system of claim 1 , wherein said buffer address calculation module comprises a controller.
7. The system of claim 1 , wherein said system reduces a memory built-in self test (BIST) area in said receiver.
8. A method of performing time and frequency de-interleaving of interleaved data in an Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver, said method comprising:
de-interleaving said interleaved data in both a time and frequency domain using exactly one random access memory (RAM) buffer; and
generating a buffer address in said RAM buffer using a buffer address calculation module, wherein said buffer address calculation module increases a size of a time de-interleaver buffer by two locations.
9. The method of claim 8 , wherein said RAM buffer comprises a dynamic random access memory (DRAM).
10. The method of claim 8 , wherein said RAM buffer comprises a static random access memory (SRAM).
11. The method of claim 8 , further comprising writing incoming data carriers to said RAM buffer out of order.
12. The method of claim 8 , further comprising reading data carriers from said RAM buffer in order.
13. The method of claim 8 , wherein said buffer address calculation module comprises a controller.
14. An Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver comprising:
exactly one random access memory (RAM) buffer that performs both time and frequency de-interleaving of said interleaved data; and
a buffer address calculation module that generates a buffer address in said buffer and increases a size of a time de-interleaver buffer by two locations.
15. The receiver of claim 14 , wherein said RAM buffer comprises a dynamic random access memory (DRAM).
16. The receiver of claim 14 , wherein said RAM buffer comprises a static random access memory (SRAM).
17. The receiver of claim 14 , wherein said RAM buffer writes incoming data carriers out of order.
18. The receiver of claim 14 , wherein said RAM buffer is read in order.
19. The receiver of claim 14 , wherein said buffer calculation module comprises a controller.
20. The receiver of claim 14 , wherein a memory built-in self test (BIST) area in said receiver is reduced.