Semiconductor device and method for manufacturing the same
View Patent ↗A semiconductor device includes a PMOS transistor of a peripheral circuit region. The PMOS transistor is formed over a silicon germanium layer to have a compressive strain structure, thereby increasing hole mobility of a channel region in operation of the device. The semiconductor device may include a second active region including a silicon layer connected to a first active region of a semiconductor substrate, a silicon germanium layer formed over the silicon layer expected to be a PMOS region, and a PMOS gate formed over the silicon germanium layer.
1. A method for manufacturing a semiconductor device, the method comprising:
forming a first active region in a semiconductor substrate;
forming a second active region over the first active region to connect the first active region to the second active region;
forming a silicon germanium layer in a PMOS region of the second active region; and
forming a PMOS gate on the silicon germanium layer and a NMOS gate on the second active region.
2. The method according to claim 1 , wherein the forming a second active region includes:
forming an insulating film on the first active region;
forming a contact hole exposing the first active region by penetrating the insulating film; and
forming a silicon layer in the contact hole and on the insulating film.
3. The method according to claim 2 , wherein the silicon layer is formed with a thickness in a range of 500 Å to 20000 Å from a surface of the insulating film.
4. The method according to claim 2 , wherein the silicon layer is formed by a selective epitaxial growth.
5. The method according to claim 1 wherein the forming a silicon germanium layer includes:
forming a hard mask pattern exposing the PMOS region on the silicon layer;
forming a trench in the second active region by using the hard mask pattern as an etch mask;
growing a silicon germanium layer in the trench; and
removing the hard mask pattern and planarizing the silicon germanium layer.
6. The method according to claim 5 , wherein the trench has a depth ranging from 300 Å to 10000 Å.
7. The method according to claim 1 , wherein the silicon germanium layer is formed by a selective epitaxial growth.
8. The method according to claim 1 , wherein the silicon germanium layer has a thickness ranging from 500 Å to 5000 Å.
9. The method according to claim 5 , wherein a mole ratio of germanium in the silicon germanium layer is 0.05 to 0.35.