IP Library Granted Patent US 7,662,695
Granted Patent B2
US 7,662,695 · App. 12/149,795 · Granted Feb 16, 2010

Capacitor structure and fabricating method thereof

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Quick Facts
Patent No.
US 7,662,695
App. No.
12/149,795
Granted
Feb 16, 2010
Kind
B2
Abstract

Disclosed are a vertical-type capacitor and a formation method thereof. The capacitor includes a first electrode wall and a second electrode wall perpendicular to a semiconductor substrate, and at least one dielectric layer on the substrate to insulate the first electrode wall from the second electrode wall. The first electrode wall includes a plurality of first conductive layers and a plurality of first contacts, the plurality of first conductive layers being interconnected with each other by each of the plurality of first contacts. The second electrode wall includes a plurality of second conductive layers and a plurality of second contacts, the plurality of second conductive layers being interconnected with each other by each of the plurality of second contacts.

Claims (9)

1. A method for forming a capacitor in a semiconductor device, comprising the steps of:

(a) forming a dielectric layer;

(b) forming at least two trenches and at least two contact holes in the dielectric layer, the at least two trenches being separated from each other;

(c) simultaneously filling the at least two trenches and the at least two contact holes to form conductive layers and contacts; and

(d) repeating steps (a) to (c) to form at least two electrode walls perpendicular to a main surface of a semiconductor substrate, each electrode wall having multiple conductive layers and multiple contacts stacked over each other, the corresponding conductive layers and the corresponding contacts of the at least two electrode walls being separated from each other by the corresponding dielectric layers.

2. The method of claim 1 , wherein filling the at least two trenches comprises filling the at least two trenches with copper.

3. The method of claim 1 , further comprising forming a barrier metal layer on the dielectric layer, before filling the at least two trenches.

4. The method of claim 1 , wherein the multiple conductive layers are formed to be interconnected with each other by the multiple contacts in the electrode walls.

5. The method of claim 4 , wherein the contacts are formed to have the same dimension as the interconnected conductive layers, in the electrode walls.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD
Reel/Frame 044555/0913 →
MERGER AND CHANGE OF NAME Recorded Nov 29, 2017
From: DONGBU ELECTRONICS CO., LTD.; DONGBU HITEK CO., LTD.
To: DONGBU HITEK CO., LTD.
Reel/Frame 044533/0523 →