Random access memory (RAM) method of operation and device for search engine systems
View Patent ↗A search engine system ( 100 ) is disclosed that can include at least one content addressable memory (CAM) device ( 102 ) arranged in a cascade configuration with at least one memory device ( 104 ), such as a static random access memory (SRAM). A CAM device ( 102 ) and memory device ( 104 ) may be connected to one another by point-to-point unidirectional connections. Command data issued by a device, such as a network processing unit (NPU) ( 110 ), can flow through all devices beginning with a CAM device ( 102 ) and eventually to a memory device ( 104 ). A memory device ( 104 ) can compare its own current result data with that of a previous device in a flow (such as another RAM device), and generate an output response.
1. A system, comprising:
a branching memory device that receives requests at an input port and forwards requests down at least a first output port and a second output port;
a first branch that includes at least one first branch memory device coupled to receive requests from the first output port; and
a second branch that includes at least one second branch memory device coupled to receive requests from the second output port.
2. The system of claim 1 , wherein:
the branching memory device, at least one first branch memory device, and at least one second branch memory device comprise random access memory devices.
3. The system of claim 1 , further including:
a joining memory device that receives requests from the first branch at a first input port and requests from the second branch at a second input port, and outputs requests at a single output port.
4. The system of claim 1 , further including:
the first branch includes a delay element that delays the transmission of requests through the first branch; and
the second branch includes more second branch memory devices than there are first branch memory devices in the first branch.
5. The system of claim 1 , further including:
the branching memory device that generates responses to requests and forwards such responses down at least a first output port and a second output port;
the at least one first branch memory device generates an internal response to each request, and outputs a first branch response based on a received response and the internal response; and
the at least one second branch memory device generates an internal response to each request, and outputs a second branch response based on a received response and the internal response.