IP Library Granted Patent US 8,296,548
Granted Patent B2
US 8,296,548 · App. 12/161,518 · Granted Oct 23, 2012

Device and method for finding extreme values in a data block

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Quick Facts
Patent No.
US 8,296,548
App. No.
12/161,518
Granted
Oct 23, 2012
Kind
B2
Abstract

A method for locating an extreme value data chunk within a data block, the method includes: fetching, by a processor, an instruction; fetching, in response to a content of the instruction, a data unit that comprises multiple data chunks; selectively masking the fetched data chunks in response to a value of a mask; comparing, by a hardware accelerator, between values of valid data chunks to provide a extreme value data chunk; wherein valid data chunks include un-masked data chunks that belong to the data block; updating the value of the mask and jumping to the stage of fetching a new data unit, until the whole data block is fetched.

Claims (63)

1. A method for locating an extreme value data chunk within a data block, the method comprises:

fetching by a processor, an instruction, wherein the instruction includes:

a data chunk size field;

a data block size field; and

a data block base address field; and

in response to the processor executing only the instruction:

fetching, in response to a content of the instruction, a data unit of a plurality of data units that comprises multiple data chunks, the size of each data chunk being determined by the data chunk size field, wherein the data block comprises the plurality of data units that are located at an address that is associated with the data block base address and the data block size field;

selectively masking the fetched data chunks in response to a value of a mask;

comparing, by a hardware accelerator, between values of valid data chunks of the data unit to provide a first extreme value data chunk of the data unit;

wherein valid data chunks include un-masked data chunks that belong to the data block, and wherein the comparing comprises performing multiple comparison operations in parallel;

comparing, by the hardware accelerator, between the first extreme value data chunk of the data unit and a second extreme value data chunk of a previously fetched data unit;

updating the value of the mask; and

jumping to the stage of fetching a new data unit of the plurality of data units that is located at another address that is associated with the data block base address and the data block size field, until the whole data block is fetched.

2. The method according to claim 1 wherein the updating comprises rotating the mask by a data unit size.

3. The method according to claim 1 wherein comparing between values of valid data chunks comprises assigning default values to non-valid data chunks.

4. The method according to claim 3 wherein comparing between values of valid data chunks comprises comparing between default values of non-valid data chunks and between values of valid data chunks.

5. The method according to claim 1 wherein comparing between values of valid data chunks comprises providing a pair of data chunks and data chunk validity information to a comparison unit, assigning a default value to a non-valid data chunk, comparing, by the comparison unit, between values of the data chunks to provide an identity of an extreme value data chunk of the pair of data chunks and to provide an extreme value of the pair of data chunks.

6. The method according to claim 1 wherein:

the instruction comprises a data block size location field; and

the method further comprises determining to jump to the stage of fetching a new data unit, until the whole data block is fetched, based upon the data block size location field.

7. The method according to claim 1 wherein:

the instruction comprises a base address location field; and

a first data unit of the plurality of data units is fetched from a location based upon the base address location field.

8. A device for locating an extreme value data chunk within a data block, the device comprises:

a memory unit adapted to store a data block comprising a plurality of data units;

a processor adapted to fetch an instruction and selectively generate control signals in response to the fetched instruction, wherein the instruction includes:

a data chunk size field;

a data block size field; and

a data block base address field; and

a hardware accelerator, coupled to the memory unit, wherein in response to executing only the instruction, the hardware accelerator is adapted to:

receive control signals from the processor based on the instruction, the control signals including a data unit size determined based upon a location of the instruction,

fetch a particular data unit of the plurality of data units, wherein the particular data unit comprises multiple data chunks, wherein the particular data unit is located at an address that is associated with the data block base address and the data block size field, and the size of each data chunk being determined by the data chunk size field;

selectively mask a portion of the fetched data chunks in response to a value of a mask, wherein a portion of the fetched data chunks that are unmasked are valid data chunks;

compare between values of valid data chunks of the particular data unit to provide a extreme value data chunk of the particular data unit; and

determine, based on the instruction:

whether to update the value of the mask;

if all data units of the plurality of data units have been fetched; and

if all data units have not been fetched, to fetch another data unit of the plurality of data units that is located at another address that is associated with the data block base address and the data block size field.

9. The device according to claim 8 wherein the hardware accelerator is adapted to rotate the mask by a data unit size.

10. The device according to claim 8 wherein the hardware accelerator is adapted to perform multiple comparison operations in parallel.

11. The device according to claim 8 wherein the hardware accelerator is adapted to assign default values to non-valid data chunks.

12. The device according to claim 11 wherein the hardware accelerator is adapted to compare between default values of non-valid data chunks and between values of valid data chunks.

13. The device according to claim 8 wherein the hardware accelerator comprises multiple comparison units, wherein a comparison unit is adapted to receive a pair of data chunks and data chunk validity information, assign a default value to a non-valid data chunk, compare between values of the data chunks to provide an identity of an extreme value data chunk of the pair of data chunks and to provide an extreme value of the pair of data chunks.

14. The device according to claim 8 wherein the processor is adapted to extract a data unit size value from the fetched instruction.

15. A method for locating an extreme value data chunk within a data block, the method comprises:

fetching by a processor, an instruction, wherein the instruction comprises:

a data chunk size field;

a data block size field; and

a data block base address field; and

in response to executing the instruction:

fetching, in response to a content of the instruction, a data unit of a plurality of data units that comprises multiple data chunks, wherein the data block comprises the plurality of data units, wherein the data unit is located at an address that is associated with the data block base address and the data block size field, and the size of each data chunk being determined by the data chunk size field;

selectively masking the fetched data chunks in response to a value of a mask;

comparing, by a hardware accelerator, between values of valid data chunks of the data unit to provide an extreme value data chunk of the data unit; wherein valid data chunks include un-masked data chunks that belong to the data block;

updating the value of the mask; and

jumping to the stage of fetching a new data unit of the plurality of data units that is located at another address that is associated with the data block base address and the data block size field, until the whole data block is fetched.

16. The method according to claim 15 wherein the updating comprises rotating the mask by a data unit size.

17. The method according to claim 15 wherein the comparing comprises assigning default values to non-valid data chunks.

18. The method according to claim 17 wherein the comparing comprises comparing between default values of non-valid data chunks and between values of valid data chunks.

19. The method according to claim 15 wherein the comparing comprises:

providing a pair of data chunks and data chunk validity information to a comparison unit;

assigning a default value to a non-valid data chunk; and

comparing, by the hardware accelerator, between values of the data chunks to provide an identity of an extreme value data chunk of the pair of data chunks and to provide an extreme value of the pair of data chunks.

20. The method according to claim 15 wherein the fetching comprises fetching an instruction that comprises a data unit size value and a data unit size location field.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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323.01(C) ASSIGNMENT OR CHANGE OF NAME IMPROPERLY FILED AND RECORDED BY ANOTHER PERSON AGAINST OWNER'S PATENT Recorded Oct 3, 2019
From: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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Reel/Frame 052459/0656 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Jun 18, 2013
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