IP Library Granted Patent US 8,101,866
Granted Patent B2
US 8,101,866 · App. 12/175,348 · Granted Jan 24, 2012

Packaging substrate with conductive structure

Assignee: Unimicron Technology Corp.
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Quick Facts
Patent No.
US 8,101,866
App. No.
12/175,348
Granted
Jan 24, 2012
Kind
B2
Abstract

A packaging substrate with conductive structure is provided, including a substrate body having at least one conductive pad on a surface thereof, a stress buffer metal layer disposed on the conductive pad, a solder resist layer disposed on the substrate body and having at least one opening therein for correspondingly exposing a portion of top surface of the stress buffer metal layer, a metal post disposed on a central portion of the surface of the stress buffer metal layer, and a solder bump covering the surfaces of the metal post. Therefore, a highly reliable conductive structure is provided, by using the stress buffer metal layer to release thermal stresses, and using the metal post and the solder bump to increase the height of the conductive structure.

Claims (27)

1. A packaging substrate with conductive structure, comprising:

a packaging substrate body having at least one conductive pad on a surface thereof;

a stress buffer metal layer disposed on the conductive pad for releasing thermal stresses by the stress buffer metal layer during reflow processes, wherein the stress buffer metal layer is made of one selected from the group consisting of tin (Sn), lead (Pb), copper (Cu), silver (Ag), bismuth (Bi), zinc (Zn), indium (In), and an alloy of a combination of the above-mentioned;

a solder resist layer disposed on the packaging substrate body and having at least one opening therein corresponding in position to the stress buffer metal layer, with a size of the opening smaller than that of the stress buffer metal layer;

a metal post disposed on a central portion of the stress buffer metal layer for releasing thermal stresses by the metal post and the stress buffer metal layer during end use; and

a solder bump at least partially covering the metal post.

2. The packaging substrate of claim 1 , wherein a melting point of the stress buffer metal layer is slightly lower than that of the solder bump.

3. The packaging substrate of claim 1 , wherein the metal post is made of one of copper (Cu), nickel/gold (Ni/Au), chromium (Cr), copper (Cu) plus nickel/palladium/gold (Ni/Pd/Au) surface treatment, copper (Cu) plus gold (Au) surface treatment, and copper (Cu) plus nickel/gold (Ni/Au) surface treatment.

4. The packaging substrate of claim 1 , further comprising a first conductive seed-layer disposed between the packaging substrate body and the conductive pad.

5. The packaging substrate of claim 1 , further comprising a second conductive seed-layer disposed between the metal post and the solder bump.

6. The packaging substrate of claim 1 , wherein the metal post protrudes from the solder resist layer.

7. The packaging substrate of claim 1 , wherein the metal post fills the opening in the solder resist layer and is in full contact with the inner wall of the opening.

8. The packaging substrate of claim 1 , wherein the side face of the metal post does not contact the inner wall of the opening in the solder resist layer.

9. The packaging substrate of claim 8 , wherein the solder bump fills the opening in the solder resist layer and is in full contact with the inner wall of the opening.

10. The packaging substrate of claim 1 , wherein a top face of the metal post is exposed from the solder bump.

11. A packaging substrate with conductive structure, comprising:

a packaging substrate body having at least one conductive pad on a surface thereof;

a stress buffer metal layer disposed on the conductive pad for releasing thermal stresses by the stress buffer metal layer during reflow processes, wherein the stress buffer metal layer is made of one selected from the group consisting of tin (Sn), lead (Pb), copper (Cu), silver (Ag), bismuth (Bi), zinc (Zn), indium (In), and an alloy of a combination of the above-mentioned;

a solder resist layer disposed on the packaging substrate body and having at least one opening therein corresponding in position to the stress buffer metal layer, with a size of the opening bigger than that of the stress buffer metal layer;

a metal post disposed on a central portion of the stress buffer metal layer for releasing thermal stresses by the metal post and the stress buffer metal layer during end use; and

a solder bump at least partially covering the metal post.

12. The packaging substrate of claim 11 , wherein a melting point of the stress buffer metal layer is slightly lower than that of the solder bump.

13. The packaging substrate of claim 11 , wherein the metal post is made of one of copper (Cu), nickel/gold (Ni/Au), chromium (Cr), copper (Cu) plus nickel/palladium/gold (Ni/Pd/Au) surface treatment, copper (Cu) plus gold (Au) surface treatment, and copper (Cu) plus nickel/gold (Ni/Au) surface treatment.

14. The packaging substrate of claim 11 , further comprising a first conductive seed-layer disposed between the packaging substrate body and the conductive pad.

15. The packaging substrate of claim 11 , further comprising a second conductive seed-layer disposed between the metal post and the solder bump.

16. The packaging substrate of claim 11 , wherein the metal post protrudes from the solder resist layer.

17. The packaging substrate of claim 11 , wherein a top face of the metal post is exposed from the solder bump.

Assignments (2)
MERGER Recorded Dec 20, 2011
From: PHOENIX PRECISION TECHNOLOGY CORPORATION
To: UNIMICRON TECHNOLOGY CORP.
Reel/Frame 027418/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2008
From: HSU, SHIH-PING
To: PHOENIX PRECISION TECHNOLOGY CORPORATION
Reel/Frame 021259/0980 →
Priority Claims (1)
TW 96126297 A · Jul 19, 2007 · national
Continuity (1)
Related Publication 20090020322A1 · Jan 22, 2009