IP Library Granted Patent US 7,868,415
Granted Patent B2
US 7,868,415 · App. 12/177,930 · Granted Jan 11, 2011

Integrated circuit with an active area line having at least one form-supporting element and corresponding method of making an integrated circuit

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Quick Facts
Patent No.
US 7,868,415
App. No.
12/177,930
Granted
Jan 11, 2011
Kind
B2
Abstract

An integrated circuit is described. The integrated circuit may have: an active area line formed of a material of a semiconductor substrate with a first longitudinal direction parallel to an upper surface of the semiconductor substrate; wherein the active area line has at least one form-supporting element extending in a second longitudinal direction parallel to the upper surface of the semiconductor substrate; and wherein the second longitudinal direction is arranged with regard to the first longitudinal direction in an angle unequal to 0 degree and unequal to 180 degree.

Claims (25)

1. An integrated circuit comprising:

an active area line formed of a material of a semiconductor substrate with a first longitudinal direction parallel to an upper surface of the semiconductor substrate;

wherein the active area line comprises at least one form-supporting element extending in a second longitudinal direction parallel to the upper surface of the semiconductor substrate; and

wherein the second longitudinal direction is arranged with regard to the first longitudinal direction in an angle unequal to 0 degree and unequal to 180 degree; and

wherein at least one second active area line is arranged on the integrated circuit, and wherein the form-supporting element extends through the at least two active area lines.

2. The integrated circuit of claim 1 , wherein the shape of the active area line with the at least one form-supporting element is defined by trenches etched into the semiconductor substrate.

3. The integrated circuit of claim 1 , wherein the active area line comprises a plurality of straight form-supporting elements that are arranged to each other in a way to form a zigzag-shaped line.

4. The integrated circuit of claim 1 , wherein the active area line comprises a plurality of non-straight form-supporting elements that are arranged to each other in a way to form an undulating-shaped line.

5. The integrated circuit of claim 1 , wherein the second longitudinal direction is arranged perpendicular with regard to the first longitudinal direction.

6. The integrated circuit of claim 2 , wherein at least one of the trenches is a non-straight trench.

7. The integrated circuit of claim 6 , wherein at least one of the trenches is a zigzag-shaped trench.

8. The integrated circuit of claim 6 , wherein at least one of the trenches is an undulating-shaped trench.

9. The integrated circuit of claim 6 , wherein at least one of the trenches has a periodic non-linear pattern.

10. , An integrated circuit comprising:

an active area line formed of a material of a semiconductor substrate with a first longitudinal direction parallel to an upper surface of the semiconductor substrate;

wherein the active area line comprises at least one form-supporting element extending in a second longitudinal direction parallel to the upper surface of the semiconductor substrate;

wherein the second longitudinal direction is arranged with regard to the first longitudinal direction in an angle unequal to 0 degree and unequal to 180 degree;

wherein the active area line comprises a plurality of non-straight form-supporting elements that are arranged to each other in a way to form an undulating-shaped line; and

wherein at least one second active area line is arranged on the integrated circuit, and wherein the form-supporting element extends through the at least two active area lines.

11. The integrated circuit of claim 10 , wherein the form-supporting element is covered at least partially by a source line.

12. An integrated circuit comprising:

an active area line formed of a material of a semiconductor substrate with a first longitudinal direction parallel to an upper surface of the semiconductor substrate;

wherein the active area line comprises at least one form-supporting element extending in a second longitudinal direction parallel to the upper surface of the semiconductor substrate; and

wherein the second longitudinal direction is arranged with regard to the first longitudinal direction in an angle unequal to 0 degree and unequal to 180 degree; and

wherein the form-supporting element is covered at least partially by a source line.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: INFINEON TECHNOLOGIES AG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 036776/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2010
From: QIMONDA FLASH GMBH
To: QIMONDA AG
Reel/Frame 024629/0532 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2008
From: WILLER, JOSEF; KEITEL-SCHULZ, DORIS; SPECHT, MICHAEL; FRIEDERICH, CHRISTOPH
To: QIMONDA FLASH GMBH
Reel/Frame 021455/0962 →