Semiconductor device having strain-inducing substrate and fabrication methods thereof
A semiconductor device includes a semiconductor substrate that includes a substrate layer having a first composition of semiconductor material. A source region, drain region, and a channel region are formed in the substrate, with the drain region spaced apart from the source region and the gate region abutting the channel region. The channel region includes a channel layer having a second composition of semiconductor material. Additionally, the substrate layer abuts the channel layer and applies a stress to the channel region along a boundary between the substrate layer and the channel layer.
1. A method for fabricating a semiconductor device, comprising:
forming a semiconductor substrate having a substrate layer with a first composition of semiconductor material;
forming a source region in the semiconductor substrate;
forming a drain region in the semiconductor substrate spaced apart from the source region;
forming a gate region in the semiconductor substrate; and
forming a channel region in the semiconductor substrate abutting the gate region and having a channel layer with a second composition of semiconductor material, wherein the substrate layer abuts the channel layer and applies a stress to the channel layer along a boundary between the substrate layer and the channel layer;
wherein:
the substrate layer applies a first stress to a first surface of the channel region along a boundary between the channel region and the substrate; and
forming the gate region includes forming a gate layer that applies a second stress to a second surface of the channel region along a boundary between the channel region and the gate region.
2. The method of claim 1 , wherein:
the substrate layer includes a semiconductor material having a first lattice constant;
the channel layer includes a semiconductor material having a second lattice constant; and
the first lattice constant is greater than the second lattice constant.
3. The method of claim 1 , wherein forming the semiconductor substrate includes forming a plurality of substrate layers upon one another, each substrate layer including a first semiconductor material and a second semiconductor material with successive layers having increasing percentages of the second semiconductor material.
4. The method of claim 3 , wherein the first semiconductor material includes silicon and the second semiconductor material includes silicon germanium.
5. The method device of claim 3 , wherein the channel layer includes the first semiconductor material, and wherein the second semiconductor material has a greater lattice constant than the first semiconductor material.
6. The method of claim 1 , wherein forming the gate region includes forming a gate region that applies a tensile force, wherein the tensile force stretches the surface of the channel region along the boundary between the channel region and the gate region.
7. The method of claim 1 , wherein:
forming the gate region includes forming the gate region from semiconductor material doped with impurities of a first polarity; and
forming the channel region includes forming the channel region from semiconductor material doped with impurities of a second polarity.
8. The method of claim 1 , further comprising:
forming a gate electrode region overlaying the semiconductor substrate; and
forming a gate contact on the gate electrode region, wherein the gate contact provides an ohmic contact to the gate electrode region.
9. The method of claim 1 , further comprising:
forming a well region in the semiconductor substrate, the substrate layer being part of the well region.
10. A method for fabricating a semiconductor device, comprising:
forming a substrate layer in a semiconductor substrate, the substrate layer having a first composition of semiconductor material, the first composition of semiconductor material having a first lattice constant;
forming a channel region in the semiconductor substrate having a second composition of semiconductor material, wherein the substrate layer abuts the channel region and applies a stress to the channel region along a boundary between the substrate layer and the channel region, the second composition of semiconductor material having a second lattice constant, the first lattice constant being different than the second lattice constant; and
forming a gate region in the semiconductor substrate abutting the channel region, the gate region applying a tensile force to the channel region, wherein the tensile force stretches the surface of the channel region along the boundary between the channel region and the gate region.
11. The method of claim 10 , further comprising:
forming a gate layer in the gate region abutting the channel region, the gate layer having a third composition of semiconductor material, the third composition of semiconductor material having a third lattice constant, the third lattice constant being different than the first lattice constant to apply the tensile force to the channel region.
12. The method of claim 10 , wherein the first lattice constant is greater than the second lattice constant.
13. The method of claim 10 , wherein the first lattice constant is less than the second lattice constant.
14. A method for fabricating a semiconductor device, comprising:
forming a gate region in the semiconductor substrate, the gate region having a first composition of semiconductor material, the first composition of semiconductor material having a first lattice constant;
forming a channel region in the semiconductor substrate having a second composition of semiconductor material, wherein the gate region abuts the channel region and applies a stress to the channel region along a boundary between the gate region and the channel region, the second composition of semiconductor material having a second lattice constant, the first lattice constant being different than the second lattice constant; and
forming a sate layer in the gate region abutting the channel region, the gate layer having the first composition of semiconductor material, the gate layer applying a tensile force to the channel region, wherein the tensile force stretches the surface of the channel region along the boundary between the channel region and the gate layer.
15. The method of claim 14 , wherein the first lattice constant is greater than the second lattice constant.
16. The method of claim 14 , wherein the first lattice constant is less than the second lattice constant.
17. The method of claim 14 , wherein the difference between the first lattice constant and the second lattice constant causes different interatomic spacing between corresponding atoms in the gate region and the channel region to induce the stress in the channel region as the atoms in the channel region attempt to align with the atoms in the gate region.
18. A method for fabricating a semiconductor device, comprising:
forming a semiconductor substrate having a substrate layer with a first composition of semiconductor material;
forming a source region in the semiconductor substrate;
forming a drain region in the semiconductor substrate spaced apart from the source region;
forming a gate region in the semiconductor substrate; and
forming a channel region in the semiconductor substrate abutting the gate region and having a channel layer with a second composition of semiconductor material, wherein the substrate layer abuts the channel layer and applies a stress to the channel layer along a boundary between the substrate layer and the channel layer;
wherein forming the gate region includes forming a gate region that applies a tensile force, wherein the tensile force stretches the surface of the channel region along the boundary between the channel region and the gate region.
19. A method for fabricating a semiconductor device, comprising:
forming a substrate layer in a semiconductor substrate, the substrate layer having a first composition of semiconductor material, the first composition of semiconductor material having a first lattice constant;
forming a channel region in the semiconductor substrate having a second composition of semiconductor material, wherein the substrate layer abuts the channel region and applies a first stress to the channel region along a boundary between the substrate layer and the channel region, the second composition of semiconductor material having a second lattice constant, the first lattice constant being different than the second lattice constant; and
forming a gate region in the semiconductor substrate abutting the channel region, the gate region applying a second stress to a second surface of the channel region along a boundary between the channel region and the gate region.