System, method and computer program product for executing a high level programming language conditional statement
View Patent ↗A method for executing an instruction, the method includes: executing a compare and configure mask instruction, wherein the executing comprises: performing a comparison to provide a comparison result; and configuring, in response to the comparison result, a multiple bit mask that is stored in a multiple-purpose register; wherein all bits of the multiple bit mask are configured to have the same value; and applying an algorithmic operation on the multiple bit mask to provide an algorithmic operation result; wherein the algorithmic operation result represents an outcome of a high level programming language conditional statement.
1. A method for executing an instruction, the method comprising:
executing by a processor a compare and configure mask instruction, wherein the executing comprises:
performing a comparison to provide a comparison result;
determining a bit value as a representation of the comparison result; and
writing the representation of the comparison result to each bit of a multiple bit mask that is stored in a plurality of bits of a multiple-purpose register, thereby duplicating the bit value in each bit of the multiple bit mask; and
applying by the processor an algorithmic operation on the multiple bit mask to provide an algorithmic operation result; wherein the algorithmic operation result represents an outcome of a high level programming language conditional statement.
2. The method according to claim 1 comprising:
performing, in parallel, multiple comparisons to provide multiple comparison results; and
configuring multiple bit masks in response to the multiple comparison results; wherein each multiple bit mask reflects a single comparison result; wherein each multiple bit mask is stored in a multiple-purpose register; wherein all bits of each multiple bit mask are configured to have the same value.
3. The method according to claim 2 comprising applying at least one algorithmic operation on at least two multiple bit masks to provide at least one algorithmic operation result.
4. The method according to claim 1 comprising fetching the compare and mask configure result by a processor that has a single true flag.
5. The method according to claim 1 comprising fetching the compare and mask configure result by a processor that has a limited number of dedicated predicates.
6. The method according to claim 1 comprising receiving a high level programmable language conditional statement and converting it to an assembly language sequence of a compare and configure mask instruction that provides a multiple bit mask and an algorithmic operation instruction that is applied on the multiple bit mask to provide an algorithmic operation result.
7. A system that comprises:
an execution unit, adapted to execute a compare and configure mask instruction that is followed by an algorithmic operation instruction by:
performing a comparison to provide a comparison result;
determining a bit value as a representation of the comparison result;
writing the representation of the comparison result to each bit of a multiple bit mask that is stored in a plurality of bits of a multiple-purpose register, thereby duplicating the bit value in each bit of the multiple bit mask; and
applying an algorithmic operation on the multiple bit mask to provide an algorithmic operation result; wherein the algorithmic operation result represents an outcome of a high level programming language conditional statement.
8. The system according to claim 7 comprising multiple execution units adapted to perform, in parallel, multiple comparisons to provide multiple comparison results; and to configure multiple bit masks in response to the multiple comparison results; wherein each multiple bit mask reflects a single comparison result; wherein each multiple bit mask is stored in a multiple-purpose register; wherein all bits of each multiple bit mask are configured to have the same value.
9. The system according to claim 8 wherein at least one execution unit is adapted to apply at least one algorithmic operation on at least one algorithmic operation result.
10. The system according to claim 7 comprising a single true flag.
11. The system according to claim 7 comprising a limited number of dedicated predicates.
12. The system according to claim 7 comprising a compiler adapted to receive a high level programmable language conditional statement and convert it to an assembly language sequence of a compare and configure mask instruction that provides a multiple bit mask and an algorithmic operation instruction that is applied on the multiple bit mask to provide an algorithmic operation result.
13. A computer program product that comprises a non-transitory computer readable medium that stores instructions for:
executing a compare and configure mask instruction, wherein the executing comprises:
performing a comparison to provide a comparison result;
determining a bit value as a representation of the comparison result; and
writing the representation of the comparison result each bit of a multiple bit mask that is stored in a plurality of bits of a multiple-purpose register, thereby repeating the bit value in each bit of the multiple bit mask; and
applying an algorithmic operation on the multiple bit mask to provide an algorithmic operation result; wherein the algorithmic operation result represents an outcome of a high level programming language conditional statement.
14. The computer program product according to claim 13 wherein the non-transitory computer readable medium further stores instructions for:
performing, in parallel, multiple comparisons to provide multiple comparison results; and
configuring multiple bit masks in response to the multiple comparison results; wherein each multiple bit mask reflects a single comparison result; wherein each multiple bit mask is stored in a multiple-purpose register; wherein all bits of each multiple bit mask are configured to have the same value.
15. The computer program product according to claim 14 wherein the non-transitory computer readable medium further stores instructions for applying at least one algorithmic operation on at least two multiple bit masks to provide at least one algorithmic operation result.
16. The computer program product according to claim 13 wherein the non-transitory computer readable medium further stores instructions for receiving a high level programmable language conditional statement and converting it to an assembly language sequence of a compare and configure mask instruction that provides a multiple bit mask and an algorithmic operation instruction that is applied on the multiple bit mask to provide an algorithmic operation result.
17. The computer program product of claim 13 wherein the non-transitory computer readable medium further stores instructions for indicating a type of comparison to perform.
18. The computer program product of claim 17 wherein the type of comparison is selected from a group consisting of equalization, greater than, not greater than, smaller than, not smaller than, and not equal.
19. The computer program product of claim 13 wherein the non-transitory computer readable medium further stores instructions for setting a single true flag.
20. The computer program product of claim 13 wherein the non-transitory computer readable medium further includes instructions for storing a limited number of dedicated predicates.