Method for forming an insulated gate field effect device
View Patent ↗An improved insulated gate field effect device ( 60 ) is obtained by providing a substrate ( 20 ) desirably comprising a III-V semiconductor, having a further semiconductor layer ( 22 ) on the substrate ( 20 ) adapted to contain the channel ( 230 ) of the device ( 60 ) between spaced apart source-drain electrodes ( 421, 422 ) formed on the semiconductor layer ( 22 ). A dielectric layer ( 24 ) is formed on the semiconductor layer ( 22 ). A sealing layer ( 28 ) is formed on the dielectric layer ( 24 ) and exposed to an oxygen plasma ( 36 ). A gate electrode ( 482 ) is formed on the dielectric layer ( 24 ) between the source-drain electrodes ( 421, 422 ). The dielectric layer ( 24 ) preferably comprises gallium-oxide ( 25 ) and/or gadolinium-gallium oxide ( 26, 27 ), and the oxygen plasma ( 36 ) is preferably an inductively coupled plasma. A further sealing layer ( 44 ) of, for example, silicon nitride is desirably provided above the sealing layer ( 28 ). Surface states and gate dielectric traps that otherwise adversely affect leakage and channel sheet resistance are much reduced.
1. A method for forming an insulated gate field effect device, comprising:
providing a semiconductor substrate having a first surface;
epitaxially forming a semiconductor layer on the first surface;
forming a dielectric layer over the semiconductor layer;
covering the dielectric layer with a first sealing layer;
exposing the first sealing layer to an oxygen plasma to produce an oxygen rich layer in the first sealing layer;
providing spaced-apart source-drain contacts on the semiconductor layer; and
providing a gate electrode on the dielectric layer disposed between the spaced-apart source-drain contacts.
2. The method of claim 1 , further comprising, after providing spaced-apart source-drain contacts, covering the first sealing layer with a second sealing layer.
3. The method of claim 1 , wherein the dielectric layer comprises one or more gallates.
4. The method of claim 3 , wherein the dielectric layer includes a first layer comprising gallium oxide and a second layer comprising gadolinium-gallium oxide.
5. The method of claim 1 , wherein the first sealing layer comprises a nitride.
6. The method of claim 5 , wherein the nitride comprises silicon nitride deposited at a temperature below about 200 degrees Celsius.
7. The method of claim 6 , wherein the silicon nitride has a thickness in the range of about 20 to 100 nanometers.
8. The method of claim 6 , wherein the nitride is deposited at a temperature below about 75 degrees Celsius.
9. The method of claim 1 , wherein the step of exposing the first sealing layer to an oxygen plasma, comprises exposing the first sealing layer to an RF oxygen plasma.
10. The method of claim 1 , wherein the step of exposing the first sealing layer to an oxygen plasma, comprises exposing the first sealing layer to an inductively coupled oxygen plasma.
11. The method of claim 1 , wherein the semiconductor layer comprises one or more materials selected from a group consisting of GaAs, AlAs/GaAs, AlGaAs, and InGaAs.
12. The method of claim 1 , further comprising the steps, performed after covering the dielectric layer and before exposing the first sealing layer to the oxygen plasma, of:
performing an oxygen implant to form insulating regions in the semiconductor substrate; and
removing and re-depositing the dielectric layer.
13. The method of claim 1 , wherein the semiconductor substrate comprises GaAs.
14. The method of claim 1 , wherein the first sealing layer comprises a further dielectric layer.
15. The method of claim 1 , wherein the oxygen rich layer is located between a top surface and a bottom surface of the first sealing layer.
16. The method of claim 15 , wherein the oxygen rich layer is spaced apart from the bottom surface of the first sealing layer.