IP Library Granted Patent US 7,961,063
Granted Patent B2
US 7,961,063 · App. 12/183,755 · Granted Jun 14, 2011

Balun signal transformer and method of forming

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Quick Facts
Patent No.
US 7,961,063
App. No.
12/183,755
Granted
Jun 14, 2011
Kind
B2
Abstract

A balanced-unbalanced (balun) signal transformer includes an unbalanced port, a balanced port coupled to the unbalanced port, the balanced port comprising a first terminal and a second terminal, a first capacitor coupled to the first terminal, a first inductor coupled to ground and the first capacitor, a second capacitor coupled to the second terminal, and a second inductor coupled to ground and the second capacitor. The transformer may also include a third capacitor coupled to a terminal of the unbalanced port; and a third inductor coupled to the third capacitor and the third terminal.

Claims (34)

1. A balanced-unbalanced (balun) signal transformer comprising:

an unbalanced port; a balanced port coupled to the unbalanced port, the balanced port comprising a first terminal and a second terminal; a first capacitor coupled to the first terminal; a first inductor coupled to ground and the first capacitor; a second capacitor coupled to the second terminal; a second inductor coupled to ground and the second capacitor, a third inductor, wherein the first capacitor and the second capacitor are connected to the third inductor; a fourth inductor, wherein the unbalanced port is formed by third and fourth terminals of the fourth inductor.

2. The transformer of claim 1 , wherein the unbalanced port comprises a third terminal and the transformer further comprises:

a third capacitor coupled to the third terminal; and

a third inductor coupled to the third capacitor and the third terminal.

3. The transformer of claim 1 , wherein the balanced-unbalanced signal transformer comprises a symmetric transformer.

4. The transformer of claim 1 , further comprising a substrate and wherein the transformer is implemented as an integrated circuit formed on the substrate.

5. The transformer of claim 1 , wherein the transformer is implemented with a combination of discrete passive components.

6. The transformer of claim 1 , wherein the third inductor is capable of inducing a current through the fourth inductor.

7. The transformer of claim 1 further comprising:

a first external port, wherein the first capacitor is coupled to the first external port through the first terminal; and

a second external port, wherein the second capacitor is coupled to the second external port through the second terminal.

8. The transformer of claim 7 , wherein the first external port and the second external port are coupled to a balanced device.

9. A method of forming a balanced-unbalanced (balun) signal transformer comprising: providing an unbalanced port; providing a balanced port coupled to the unbalanced port, the balanced port comprising a first terminal and a second terminal; providing a first capacitor coupled to the first terminal; providing a first inductor coupled to ground and the first capacitor; providing a second capacitor coupled to the second terminal; providing a second inductor coupled to ground and the second capacitor; and providing a third inductor, wherein the first capacitor and the second capacitor are connected to the third inductor; providing a fourth inductor, wherein the unbalanced port is formed by third and fourth terminals of the fourth inductor.

10. The method of claim 9 , further comprising:

providing a third capacitor coupled to a third terminal, wherein the unbalanced port comprises a third terminal.

11. A balanced-unbalanced (balun) signal transformer comprising:

an unbalanced port, the unbalanced port having a first terminal and a second terminal;

a balanced port coupled to the unbalanced port, the balanced port comprising a third terminal and a fourth terminal;

a first capacitor coupled to the third terminal;

a first inductor coupled to ground and the first capacitor;

a second capacitor coupled to the fourth terminal;

a second inductor coupled to ground and the second capacitor;

a third capacitor coupled to the first terminal and the second terminal; and

a third inductor coupled to the first terminal and the second terminal, wherein the third capacitor and the third inductor are coupled in parallel.

12. The transformer of claim 11 , wherein the balanced-unbalanced signal transformer comprises a symmetric transformer.

13. The transformer of claim 11 , further comprising a substrate and wherein the transformer is implemented as an integrated circuit formed on the substrate.

14. The transformer of claim 11 , wherein the transformer is implemented with a combination of discrete passive components.

15. The transformer of claim 11 , further comprising a fourth inductor, wherein the unbalanced port is formed by third and fourth terminals of the fourth inductor.

16. The transformer of claim 11 , wherein the third inductor is capable of inducing a current through the fourth inductor.

17. The transformer of claim 11 further comprising:

a first external port, wherein the first capacitor is coupled to the first external port through the first terminal; and

a second external port, wherein the second capacitor is coupled to the second external port through the second terminal.

18. The transformer of claim 17 , wherein the first external port and the second external port are coupled to a balanced device.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0757 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
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To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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SECURITY AGREEMENT Recorded Dec 9, 2008
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To: CITIBANK, N.A.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2008
From: LIU, LIANJUN; ABROKWAH, JONATHAN K.; HARTIN, OLIN L.; LI, QIANG
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