Port assignment in hierarchical designs by abstracting macro logic
View Patent ↗A method to reduce the problem complexity maintains a relatively high quality port assignment by abstracting local connections in the macro when performing the port assignment. This is done for netlength, congestion as well as timing. The internal netlist of the macro is abstracted in such a way that the optimization of the external interconnect can be done in an efficient manner. Three levels of abstractions are described. A first level optimizes the top level interconnect, a second level optimizes the top level and macro interconnects, while a third level optimizes the top level timing.
1. A computer-implemented method for abstracting a plurality of local connections in a macro portion of an integrated circuit, comprising:
using a computer processor to perform the following:
replacing each of a plurality of ports within the macro portion with a corresponding one of a plurality of virtual circuit components;
removing any internal logic from within the macro portion;
assigning the plurality of virtual circuit components to the macro portion by movebounds to create abstracted logic within the macro portion;
carrying out a flat placement of the abstracted logic with movebounds;
carrying out a top level flat routing;
defining each of the plurality of ports within the macro portion where routing enters the macro portion; and
replacing internal logic of the macro portion by original logic of the macro portion.
2. The method of claim 1 , wherein defining each of the plurality of ports where routing enters the macro portion occurs in x, y, z coordinates.
3. The method of claim 1 , wherein the original logic of the macro portion includes combinational logic or sequential logic, and wherein the plurality of virtual components includes an inverter, a buffer, a terminator, or a load book.
4. The method of claim 1 , further comprising adding a plurality of virtual nets to connect together the plurality of virtual circuit components.
5. The method of claim 4 , wherein the plurality of virtual circuit components are connected according to an internal structure of the macro portion.
6. The method of claim 4 , wherein the plurality of virtual circuit components are connected according to a distance between the corresponding ports.
7. The method of claim 6 , wherein a weight is assigned to the distance between the corresponding ports.
8. A computer program product including a non-transitory computer-readable storage medium having computer-executable program instructions stored thereon, that, when processed by a computer, cause the computer to implement a method for abstracting a plurality of local connections in a macro portion of an integrated circuit, said method comprising:
replacing each of a plurality of ports within the macro portion with a corresponding one of a plurality of virtual circuit components;
removing any internal logic from within the macro portion;
assigning the plurality of virtual circuit components to the macro portion by movebounds to create abstracted logic within the macro portion;
carrying out a flat placement of the abstracted logic with movebounds;
carrying out a top level flat routing;
defining each of the plurality of ports within the macro portion where routing enters the macro portion; and
replacing internal logic of the macro portion by original logic of the macro portion.
9. The computer program product of claim 8 , wherein defining each of the plurality of ports where routing enters the macro portion occurs in x, y, z coordinates.
10. The computer program product of claim 8 , wherein the original logic of the macro portion includes combinational logic or sequential logic, and wherein the plurality of virtual circuit components includes an inverter, a buffer, a terminator, or a load book.
11. The computer program product of claim 8 , the method further comprising adding a plurality of virtual nets to connect together the plurality of virtual circuit components.
12. The computer program product of claim 11 , wherein the plurality of virtual circuit components are connected according to an internal structure of the macro portion.
13. The computer program product of claim 11 , wherein the plurality of virtual circuit components are connected according to a distance between the corresponding ports.
14. The computer program product of claim 13 , wherein a weight is assigned to the distance between the corresponding ports.
15. A computer-implemented method for abstracting a plurality of local connections in a macro portion of an integrated circuit, comprising:
using a computer processor to perform the following:
replacing each of a plurality of ports within the macro portion with a corresponding one of a plurality of virtual latches;
removing any internal logic from within the macro portion;
assigning the plurality of virtual latches to the macro portion by movebounds to create abstracted logic within the macro portion;
carrying out a flat timing driven placement of the abstracted logic with movebounds;
carrying out a top level flat timing driven routing;
defining each of the plurality of ports within the macro portion where routing enters the macro portion; and
replacing internal logic of the macro portion by original logic of the macro portion.
16. The method of claim 15 , wherein defining each of the plurality of ports where routing enters the macro portion occurs in x, y, z coordinates.
17. The method of claim 15 , further comprising adding a plurality of virtual nets to connect together the plurality of virtual latches.
18. The method of claim 17 , wherein the plurality of virtual latches are connected according to an internal structure of the macro portion.
19. The method of claim 17 , wherein the plurality of virtual latches are connected according to a distance between the corresponding ports.
20. The method of claim 19 , wherein a weight is assigned to the distance between the corresponding ports.