Semiconductor devices including implanted regions and protective layers
A semiconductor structure includes a Group III-nitride semiconductor layer, a protective layer on the semiconductor layer, a distribution of implanted dopants within the semiconductor layer, and an ohmic contact extending through the protective layer to the semiconductor layer.
1. A semiconductor structure comprising:
a Group III-nitride semiconductor layer;
a dielectric protective layer on the Group III-nitride semiconductor layer, the dielectric protective layer having at least one window therein exposing a portion of the Group III-nitride semiconductor layer;
an ohmic contact extending through the window in the dielectric protective layer to contact the Group III-nitride semiconductor layer; and
a distribution of implanted silicon dopants within the Group III-nitride semiconductor layer, wherein the distribution of implanted silicon dopants has a peak concentration at an interface of the Group III-nitride semiconductor layer and the ohmic contact.
2. The semiconductor structure of claim 1 , wherein the dielectric protective layer comprises high purity SiN that has a concentration of hydrogen less than 2×10 21 cm −3 and/or a concentration of oxygen less than 3×10 18 cm −3 as measured by secondary ion mass spectrometry using a Cs ion beam.
3. The semiconductor structure of claim 1 , wherein the distribution of implanted silicon dopants has a peak implant concentration of about 1×10 18 cm −3 or greater.
4. The semiconductor structure of claim 3 , wherein the distribution of implanted dopants has a peak implant concentration of about 5×10 19 cm −3 .
5. The semiconductor structure of claim 1 , wherein the ohmic contact is in direct contact with the dielectric protective layer.
6. The semiconductor structure of claim 1 , wherein the dielectric protective layer comprises SiN, the structure further comprising:
a gap between the ohmic contact and the dielectric protective layer; and
a passivation layer comprising a material different from the dielectric protective layer in the gap.
7. The semiconductor structure of claim 1 , further comprising:
a non-ohmic metal contact extending through the dielectric protective layer to the Group III-nitride semiconductor layer, wherein the non-ohmic metal contact consists of the same material as the ohmic contact.
8. The semiconductor structure of claim 1 , further comprising:
a non-ohmic metal contact extending through the dielectric protective layer to the Group III-nitride semiconductor layer, wherein the non-ohmic metal contact comprises a T-gate contact.
9. The semiconductor structure of claim 1 , wherein the distribution of implanted silicon dopants decreases with distance from the interface of the Group III-nitride semiconductor layer and the dielectric protective layer.
10. The semiconductor structure according to claim 1 , further comprising a barrier layer between the Group III-nitride semiconductor layer and the dielectric protective layer.
11. The semiconductor structure according to claim 10 , wherein the barrier layer comprises at least one of AlN, AlInN, AlGaN and AlInGaN.
12. A transistor device comprising:
a Group III-nitride semiconductor layer including source and drain regions;
a SiN protective layer on the Group III-nitride semiconductor layer;
source and drain ohmic contacts extending through the SiN protective layer to contact the source and drain regions, respectively, of the Group III-nitride semiconductor layer; and
a distribution of implanted silicon dopants within the source and drain regions of the Group III-nitride semiconductor layer, wherein the distribution of implanted silicon dopants has a peak concentration at an interface of the Group III-nitride semiconductor layer and the source and drain ohmic contacts.
13. The transistor device of claim 12 , further comprising:
a non-ohmic metal contact extending through the SiN protective layer to the Group III-nitride semiconductor layer, wherein the non-ohmic metal contact comprises a T-gate contact to the Group III-nitride semiconductor layer.
14. The transistor device of claim 12 , wherein the SiN protective layer comprises high purity SiN that has a concentration of hydrogen less than 2×10 21 cm −3 and/or a concentration of oxygen less than 3×10 18 cm −3 as measured by secondary ion mass spectrometry using a Cs ion beam.
15. The transistor device of claim 12 , further comprising:
a non-ohmic metal contact extending through the SiN protective layer to the Group III-nitride semiconductor layer, wherein the non-ohmic metal contact consists of the same material as one of the source and drain ohmic contacts.
16. The transistor device of claim 12 , wherein the distribution of implanted silicon dopants has a peak implant concentration greater than 1×10 18 cm −3 .
17. The transistor device of claim 16 , wherein the distribution of implanted silicon dopants has a peak implant concentration of about 5×10 19 cm −3 .
18. The transistor device of claim 12 , wherein the distribution of implanted silicon dopants has a peak implant concentration greater than about 1×10 20 cm −3 .
19. The transistor device of claim 12 , wherein the distribution of implanted silicon dopants has a peak implant concentration greater than about 3×10 20 cm −3 .
20. The transistor device of claim 12 , wherein the distribution of implanted silicon dopants decreases with distance from the interface of the Group III-nitride semiconductor layer and the SiN protective layer.
21. A semiconductor structure comprising:
a Group III-nitride semiconductor layer;
a dielectric protective layer on the Group III-nitride semiconductor layer, the dielectric protective layer having at least one window therein exposing a portion of the Group III-nitride semiconductor layer;
an ohmic contact extending through the window in the dielectric protective layer to contact the Group III-nitride semiconductor layer; and
a distribution of implanted silicon dopants within the Group III-nitride semiconductor layer, wherein the distribution of implanted silicon dopants has a peak concentration of 1×10 18 cm −3 or greater at an interface of the Group III-nitride semiconductor layer and the ohmic contact.
22. The semiconductor structure of claim 21 , further comprising:
a non-ohmic metal contact extending through the dielectric protective layer to the Group III-nitride semiconductor layer, wherein the non-ohmic metal contact consists of the same metal as the ohmic contact.
23. The semiconductor structure of claim 21 , further comprising:
a non-ohmic metal contact extending through the dielectric protective layer to the Group III-nitride semiconductor layer, wherein the non-ohmic metal contact comprises a T-gate contact.
24. The semiconductor structure of claim 21 , wherein the distribution of implanted silicon dopants has a peak implant concentration greater than about 1×10 20 cm −3 .
25. The semiconductor structure of claim 21 , wherein the distribution of implanted silicon dopants has a peak implant concentration greater than about 3×10 20 cm −3 .
26. The semiconductor structure of claim 21 , wherein the distribution of implanted silicon dopants decreases with distance from the interface of the Group III-nitride semiconductor layer and the dielectric protective layer.